> -Original Message-
> From: Jeremy Linton
> Sent: Thursday, April 26, 2018 5:01 AM
> To: linux-a...@vger.kernel.org
> Cc: sudeep.ho...@arm.com; linux-arm-ker...@lists.infradead.org;
> lorenzo.pieral...@arm.com; hanjun@linaro.org; r...@rjwysocki.net;
> will.dea...@arm.com; catalin.ma
Hi Jeremy,
> -Original Message-
> From: Jeremy Linton
> Sent: Thursday, March 1, 2018 3:36 AM
> To: linux-a...@vger.kernel.org
> Cc: linux-arm-ker...@lists.infradead.org; sudeep.ho...@arm.com;
> lorenzo.pieral...@arm.com; hanjun@linaro.org; r...@rjwysocki.net;
> will.dea...@arm.com; c
Hi,
> -Original Message-
> From: linux-arm-kernel
[mailto:linux-arm-kernel-boun...@lists.infradead.org]
> On Behalf Of Xiongfeng Wang
> Sent: Saturday, February 24, 2018 8:36 AM
> To: Lorenzo Pieralisi ; Jeremy Linton
>
> Cc: mark.rutl...@arm.com; jonathan.zh...@cavium.com;
> jayachandran
Hi Jeremy
> -Original Message-
> From: linux-arm-kernel
[mailto:linux-arm-kernel-boun...@lists.infradead.org]
> On Behalf Of Jeremy Linton
> Sent: Wednesday, January 3, 2018 10:28 PM
> To: vkil...@codeaurora.org
> Cc: 'Mark Rutland' ; jonathan.zh...@cavium.com;
> jayachandran.n...@cavium.c
Hi Jeremy,
Sorry, I don't have your previous patch emails to reply on right patch
context.
So commenting on top of this patch.
AFAIU, the PPTT v5 patches still rely on CLIDR_EL1 register to know the type
of
Caches enabled/available on the platform. With PPTT, it should not rely on
architecture
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