On Fri, Dec 7, 2018 at 5:53 PM Christophe Kerello
wrote:
> On 12/7/18 10:06 AM, Linus Walleij wrote:
> Based on FMC2 datasheet,
> The FMC2 controller includes 2 memory controllers:
> - the NOR/PSRAM memory controller
> - the NAND memory controller
>
> The NOR/PSRAM controller mapping is
On 12/7/18 10:06 AM, Linus Walleij wrote:
Hi Christophe,
On Thu, Nov 29, 2018 at 5:42 PM Christophe Kerello
wrote:
+/* FMC2 Controller Registers */
+#define FMC2_BCR1 0x0
+#define FMC2_PCR 0x80
(...)
+/* Register: FMC2_BCR1 */
+#define
On 12/7/18 10:06 AM, Linus Walleij wrote:
Hi Christophe,
On Thu, Nov 29, 2018 at 5:42 PM Christophe Kerello
wrote:
+/* FMC2 Controller Registers */
+#define FMC2_BCR1 0x0
+#define FMC2_PCR 0x80
(...)
+/* Register: FMC2_BCR1 */
+#define
On Fri, Dec 7, 2018 at 11:22 AM Benjamin GAIGNARD
wrote:
> On 12/7/18 10:06 AM, Linus Walleij wrote:
> > Hi Christophe,
> >
> > On Thu, Nov 29, 2018 at 5:42 PM Christophe Kerello
> > wrote:
> >
> >> +/* FMC2 Controller Registers */
> >> +#define FMC2_BCR1 0x0
> >> +#define
On Fri, Dec 7, 2018 at 11:22 AM Benjamin GAIGNARD
wrote:
> On 12/7/18 10:06 AM, Linus Walleij wrote:
> > Hi Christophe,
> >
> > On Thu, Nov 29, 2018 at 5:42 PM Christophe Kerello
> > wrote:
> >
> >> +/* FMC2 Controller Registers */
> >> +#define FMC2_BCR1 0x0
> >> +#define
Hi Miquèl,
This patchset already takes into account new framework modifications
done by Boris (3rd batch of cleanups).
The select_chip hook is not used any more in this patchset and
exec_op/setup_data_interface hooks have been moved to
nand_controller_ops structure.
static const struct
Hi Miquèl,
This patchset already takes into account new framework modifications
done by Boris (3rd batch of cleanups).
The select_chip hook is not used any more in this patchset and
exec_op/setup_data_interface hooks have been moved to
nand_controller_ops structure.
static const struct
On 12/7/18 10:06 AM, Linus Walleij wrote:
> Hi Christophe,
>
> On Thu, Nov 29, 2018 at 5:42 PM Christophe Kerello
> wrote:
>
>> +/* FMC2 Controller Registers */
>> +#define FMC2_BCR1 0x0
>> +#define FMC2_PCR 0x80
> (...)
>> +/* Register: FMC2_BCR1 */
>>
On 12/7/18 10:06 AM, Linus Walleij wrote:
> Hi Christophe,
>
> On Thu, Nov 29, 2018 at 5:42 PM Christophe Kerello
> wrote:
>
>> +/* FMC2 Controller Registers */
>> +#define FMC2_BCR1 0x0
>> +#define FMC2_PCR 0x80
> (...)
>> +/* Register: FMC2_BCR1 */
>>
Hi Christophe,
Christophe Kerello wrote on Thu, 29 Nov
2018 17:41:02 +0100:
> The driver adds the support for the STMicroelectronics FMC2 NAND
> Controller found on STM32MP SOCs.
>
> This patch is based on FMC2 command sequencer.
> The purpose of the command sequencer is to facilitate the
Hi Christophe,
Christophe Kerello wrote on Thu, 29 Nov
2018 17:41:02 +0100:
> The driver adds the support for the STMicroelectronics FMC2 NAND
> Controller found on STM32MP SOCs.
>
> This patch is based on FMC2 command sequencer.
> The purpose of the command sequencer is to facilitate the
Hi Christophe,
On Thu, Nov 29, 2018 at 5:42 PM Christophe Kerello
wrote:
> +/* FMC2 Controller Registers */
> +#define FMC2_BCR1 0x0
> +#define FMC2_PCR 0x80
(...)
> +/* Register: FMC2_BCR1 */
> +#define FMC2_BCR1_FMC2EN BIT(31)
Well
Hi Christophe,
On Thu, Nov 29, 2018 at 5:42 PM Christophe Kerello
wrote:
> +/* FMC2 Controller Registers */
> +#define FMC2_BCR1 0x0
> +#define FMC2_PCR 0x80
(...)
> +/* Register: FMC2_BCR1 */
> +#define FMC2_BCR1_FMC2EN BIT(31)
Well
The driver adds the support for the STMicroelectronics FMC2 NAND
Controller found on STM32MP SOCs.
This patch is based on FMC2 command sequencer.
The purpose of the command sequencer is to facilitate the programming
and the reading of NAND flash pages with the ECC and to free the CPU
of
The driver adds the support for the STMicroelectronics FMC2 NAND
Controller found on STM32MP SOCs.
This patch is based on FMC2 command sequencer.
The purpose of the command sequencer is to facilitate the programming
and the reading of NAND flash pages with the ECC and to free the CPU
of
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