On Fri, 10 Nov 2000, Brian Gerst wrote:
> > The datasheets are somewhat confusing, as it doesn't mention bit 10
> > at all, just an oversized box for bit 11.
> The Athlons support sysenter and syscall, but the K6's only support
> syscall. The earlier version of syscall (bit 10) is undocumented b
[EMAIL PROTECTED] wrote:
>
> On Fri, 10 Nov 2000, Brian Gerst wrote:
>
> > > features: fpu vme de pse tsc msr mce cx8 pge mmx syscall 3dnow
> >
> > The K6's don't support sysenter/sysexit.
>
> The K6 datasheets suggests otherwise.
> Some models seem to have sysenter/sysexit, whilst othe
On Fri, 10 Nov 2000, H. Peter Anvin wrote:
> > And where does sysenter/sysexit fit in?
> sysenter/sysexit is the "sep" feature.
Ah, of course.
*slaps head*
regards,
davej.
--
| Dave Jones <[EMAIL PROTECTED]> http://www.suse.de/~davej
| SuSE Labs
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[EMAIL PROTECTED] wrote:
> On Fri, 10 Nov 2000, Brian Gerst wrote:
>
> > > features: fpu vme de pse tsc msr mce cx8 pge mmx syscall 3dnow
> >
> > The K6's don't support sysenter/sysexit.
>
> The K6 datasheets suggests otherwise.
> Some models seem to have sysenter/sysexit, whilst others
On Fri, 10 Nov 2000, Brian Gerst wrote:
> > features: fpu vme de pse tsc msr mce cx8 pge mmx syscall 3dnow
>
> The K6's don't support sysenter/sysexit.
The K6 datasheets suggests otherwise.
Some models seem to have sysenter/sysexit, whilst others have
syscall/sysret. No model seems to h
On Fri, 10 Nov 2000, H. Peter Anvin wrote:
> That is actually correct -- the K6-2 doesn't actually have mtrr and sep,
> but has syscall and k6_mtrr instead (the stepping bug causes k6_mtrr not
> to show up.) Part of the bugginess of the old system was using one flag
> for multiple purposes. Thi
[EMAIL PROTECTED] wrote:
>
> Hi hpa,
>
> First test, the AMD K6-2.
>
> Also, look at the feature flags:
> before:
> flags : fpu vme de pse tsc msr mce cx8 sep mtrr pge mmx 3dnow
>
> after:
> features: fpu vme de pse tsc msr mce cx8 pge mmx syscall 3dnow
>
> Note, I lost MTRR
[EMAIL PROTECTED] wrote:
>
> Hi hpa,
>
> First test, the AMD K6-2.
>
> Before your patch..
> cpu family : 5
> model : 8
> stepping: 12
>
> After..
>
> cpu family : 5
> model : 8
> stepping: 4
>
> L
Hi hpa,
First test, the AMD K6-2.
Before your patch..
cpu family : 5
model : 8
stepping: 12
After..
cpu family : 5
model : 8
stepping: 4
Line 1826 of setup.c
c->x86_mask = tfms & 7;
Shoul
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