On Wednesday 25 April 2007 03:12:51 H. Peter Anvin wrote:
> You can probably find almost any possible bitmask if you look long
> enough. Hardware vendors are notorious for this kind of "optimizations".
The nice thing is if this was solved in the IOMMU code then we could drop
(or not initialize)
Andi Kleen wrote:
On Tuesday 24 April 2007 23:50:26 David Miller wrote:
From: Ashok Raj <[EMAIL PROTECTED]>
Date: Tue, 24 Apr 2007 14:38:35 -0700
Its not clear if we have a very generic device breakage.. most devices
on these platforms are going to be more recent, (except maybe some
legacy fd)
On Tue, 24 Apr 2007 14:50:26 -0700 (PDT)
David Miller <[EMAIL PROTECTED]> wrote:
> From: Ashok Raj <[EMAIL PROTECTED]>
> Date: Tue, 24 Apr 2007 14:38:35 -0700
>
> > Its not clear if we have a very generic device breakage.. most devices
> > on these platforms are going to be more recent, (except m
On Wed, Apr 25, 2007 at 12:03:57AM +0200, Andi Kleen wrote:
> On Tuesday 24 April 2007 23:50:26 David Miller wrote:
> > From: Ashok Raj <[EMAIL PROTECTED]>
> > Date: Tue, 24 Apr 2007 14:38:35 -0700
> >
> > > Its not clear if we have a very generic device breakage.. most devices
> > > on these plat
On Tuesday 24 April 2007 23:50:26 David Miller wrote:
> From: Ashok Raj <[EMAIL PROTECTED]>
> Date: Tue, 24 Apr 2007 14:38:35 -0700
>
> > Its not clear if we have a very generic device breakage.. most devices
> > on these platforms are going to be more recent, (except maybe some
> > legacy fd)...
From: Ashok Raj <[EMAIL PROTECTED]>
Date: Tue, 24 Apr 2007 14:38:35 -0700
> Its not clear if we have a very generic device breakage.. most devices
> on these platforms are going to be more recent, (except maybe some
> legacy fd)...
I'm not so sure, there are some "modern" sound cards that have
a
From: Roland Dreier <[EMAIL PROTECTED]>
Date: Tue, 24 Apr 2007 14:32:42 -0700
> > My suggestion would be to allocate top-down in the 32-bit IOMMU space.
>
> I think that's good for normal things, but it's not unreasonable to
> want to map > 4 GB of memory at once for an Infiniband device.
That'
On Tue, Apr 24, 2007 at 02:23:51PM -0700, David Miller wrote:
> From: Andi Kleen <[EMAIL PROTECTED]>
> Date: Tue, 24 Apr 2007 23:12:54 +0200
>
> > We already have a couple of other IOMMU architectures who essentially have
> > the same
> > problem. Have you checked how they solve this?
>
> Sparc6
> My suggestion would be to allocate top-down in the 32-bit IOMMU space.
I think that's good for normal things, but it's not unreasonable to
want to map > 4 GB of memory at once for an Infiniband device.
So maybe we would want some heuristics about the size of the mapping
being requested or the
From: Andi Kleen <[EMAIL PROTECTED]>
Date: Tue, 24 Apr 2007 23:12:54 +0200
> We already have a couple of other IOMMU architectures who essentially have
> the same
> problem. Have you checked how they solve this?
Sparc64, for one, only uses 32-bit IOMMU addresses. And we simply
don't try to hand
On Tuesday 24 April 2007 22:33:04 Ashok Raj wrote:
> With PCIE there is some benefit to keep dma addr low for performance reasons,
> since it will use 32bit Transaction level packets instead of 64bit.
>
> This reservation is only required if we have some legacy device under a p2p
> where it
On Tue, Apr 24, 2007 at 09:33:15PM +0200, Andi Kleen wrote:
> On Tuesday 24 April 2007 08:03:07 Ashok Raj wrote:
> > Some devices may not support entire 64bit DMA. In a situation where such
> > devices are co-located in a shared domain, we need to ensure there is some
> > address space reserved f
On Tuesday 24 April 2007 08:03:07 Ashok Raj wrote:
> Some devices may not support entire 64bit DMA. In a situation where such
> devices are co-located in a shared domain, we need to ensure there is some
> address space reserved for such devices without the low addresses getting
> depleted by othe
Some devices may not support entire 64bit DMA. In a situation where such
devices are co-located in a shared domain, we need to ensure there is some
address space reserved for such devices without the low addresses getting
depleted by other devices capable of handling high dma addresses.
Signed-o
Some devices may not support entire 64bit DMA. In a situation where such
devices are co-located in a shared domain, we need to ensure there is some
address space reserved for such devices without the low addresses getting
depleted by other devices capable of handling high dma addresses.
Signed-o
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