: Arnd Bergmann ; Greg Kroah-Hartman
> > ; LKML ;
> > michal.si...@xilinx.com; Hyun Kwon ; Dhaval
> > Rajeshbhai Shah
> > Subject: Re: [PATCH] [linux][master][v1] misc: Add Xilinx ZYNQMP VCU
> > logicoreIP init driver
> >
> > Daval,
> >
> > On Tue, Dec
bhai Shah
> Subject: Re: [PATCH] [linux][master][v1] misc: Add Xilinx ZYNQMP VCU
> logicoreIP init driver
>
> Daval,
>
> On Tue, Dec 5, 2017 at 12:43 PM, Dhaval Shah
> wrote:
> > Xilinx ZYNQMP VCU Init driver is based on the new LogiCoreIP design
> > created.
Daval,
On Tue, Dec 5, 2017 at 12:43 PM, Dhaval Shah wrote:
> Xilinx ZYNQMP VCU Init driver is based on the new LogiCoreIP design
> created. This driver will provide the api which can be used
> by the encoder and decoder driver to get the configured value.
>
> Signed-off-by: Dhaval Shah
[]
> diff
PATCH] [linux][master][v1] misc: Add Xilinx ZYNQMP VCU
> logicoreIP init driver
>
> On Wed, Dec 06, 2017 at 09:05:51AM +, Dhaval Rajeshbhai Shah wrote:
> > > Then you need to explain this a lot better, posting a random driver
> > > for submission that is expected to b
On Wed, Dec 06, 2017 at 09:05:51AM +, Dhaval Rajeshbhai Shah wrote:
> > Then you need to explain this a lot better, posting a random driver for
> > submission that is expected to be used by another one isn't ok.
> > Post the whole patch series please, we do not add infrastructure to the
> > ker
PATCH] [linux][master][v1] misc: Add Xilinx ZYNQMP VCU
> logicoreIP init driver
>
> On Wed, Dec 06, 2017 at 06:01:37AM +, Dhaval Rajeshbhai Shah wrote:
> > Hi Greg k-h,
> >
> > Thanks a lot for the review.
> >
> > Replies inline.
>
> As they should b
On Wed, Dec 06, 2017 at 06:01:37AM +, Dhaval Rajeshbhai Shah wrote:
> Hi Greg k-h,
>
> Thanks a lot for the review.
>
> Replies inline.
As they should be, perhaps you need a better email client :)
>
> > +config XILINX_VCU
> > + tristate "Xilinx VCU Init"
> > + default n
>
> Th
; Dhaval Rajeshbhai Shah
Subject: Re: [PATCH] [linux][master][v1] misc: Add Xilinx ZYNQMP VCU logicoreIP
init driver
On Tue, Dec 05, 2017 at 03:43:32AM -0800, Dhaval Shah wrote:
> Xilinx ZYNQMP VCU Init driver is based on the new LogiCoreIP design
> created. This driver will provide the api whi
: [PATCH] [linux][master][v1] misc: Add Xilinx ZYNQMP VCU logicoreIP
init driver
On Tue, Dec 5, 2017 at 1:38 PM, Dhaval Rajeshbhai Shah wrote:
> From: arndbergm...@gmail.com [mailto:arndbergm...@gmail.com] On Behalf
> Of Arnd Bergmann
> Sent: Tuesday, December 05, 2017 4:19 AM
> To: Dhava
ichal Simek ; Hyun
> Kwon ; Dhaval Rajeshbhai Shah
> Subject: Re: [PATCH] [linux][master][v1] misc: Add Xilinx ZYNQMP VCU
> logicoreIP init driver
>
> On Tue, Dec 5, 2017 at 12:43 PM, Dhaval Shah wrote:
>> Xilinx ZYNQMP VCU Init driver is based on the new LogiCoreIP design
>&
On Tue, Dec 05, 2017 at 03:43:32AM -0800, Dhaval Shah wrote:
> Xilinx ZYNQMP VCU Init driver is based on the new LogiCoreIP design
> created. This driver will provide the api which can be used
> by the encoder and decoder driver to get the configured value.
Your subject has a lot of [] in it, none
; Hyun
Kwon ; Dhaval Rajeshbhai Shah
Subject: Re: [PATCH] [linux][master][v1] misc: Add Xilinx ZYNQMP VCU logicoreIP
init driver
On Tue, Dec 5, 2017 at 12:43 PM, Dhaval Shah wrote:
> Xilinx ZYNQMP VCU Init driver is based on the new LogiCoreIP design
> created. This driver will provide t
On Tue, Dec 5, 2017 at 12:43 PM, Dhaval Shah wrote:
> Xilinx ZYNQMP VCU Init driver is based on the new LogiCoreIP design
> created. This driver will provide the api which can be used
> by the encoder and decoder driver to get the configured value.
>
> Signed-off-by: Dhaval Shah
Can you explain
Xilinx ZYNQMP VCU Init driver is based on the new LogiCoreIP design
created. This driver will provide the api which can be used
by the encoder and decoder driver to get the configured value.
Signed-off-by: Dhaval Shah
---
drivers/misc/Kconfig| 6 +
drivers/misc/Makefile | 1 +
drivers/
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