Re: [PATCH] ARM: bcm2835: Use 0x4 prefix for DMA bus addresses to SDRAM.

2015-05-13 Thread Eric Anholt
Lee Jones writes: > On Tue, 05 May 2015, Eric Anholt wrote: > >> Stephen Warren writes: >> >> > On 05/04/2015 01:33 PM, Eric Anholt wrote: >> >> There exists a tiny MMU, configurable only by the VC (running the >> >> closed firmware), which maps from the ARM's physical addresses to bus >> >> ad

Re: [PATCH] ARM: bcm2835: Use 0x4 prefix for DMA bus addresses to SDRAM.

2015-05-13 Thread Lee Jones
On Tue, 05 May 2015, Eric Anholt wrote: > Stephen Warren writes: > > > On 05/04/2015 01:33 PM, Eric Anholt wrote: > >> There exists a tiny MMU, configurable only by the VC (running the > >> closed firmware), which maps from the ARM's physical addresses to bus > >> addresses. These bus addresses

Re: [PATCH] ARM: bcm2835: Use 0x4 prefix for DMA bus addresses to SDRAM.

2015-05-05 Thread Eric Anholt
Stephen Warren writes: > On 05/04/2015 01:33 PM, Eric Anholt wrote: >> There exists a tiny MMU, configurable only by the VC (running the >> closed firmware), which maps from the ARM's physical addresses to bus >> addresses. These bus addresses determine the caching behavior in the >> VC's L1/L2

Re: [PATCH] ARM: bcm2835: Use 0x4 prefix for DMA bus addresses to SDRAM.

2015-05-05 Thread Stephen Warren
On 05/04/2015 02:25 PM, Noralf Trønnes wrote: Den 04.05.2015 21:33, skrev Eric Anholt: There exists a tiny MMU, configurable only by the VC (running the closed firmware), which maps from the ARM's physical addresses to bus addresses. These bus addresses determine the caching behavior in the VC

Re: [PATCH] ARM: bcm2835: Use 0x4 prefix for DMA bus addresses to SDRAM.

2015-05-05 Thread Stephen Warren
On 05/04/2015 01:33 PM, Eric Anholt wrote: There exists a tiny MMU, configurable only by the VC (running the closed firmware), which maps from the ARM's physical addresses to bus addresses. These bus addresses determine the caching behavior in the VC's L1/L2 (note: separate from the ARM's L1/L2)

Re: [PATCH] ARM: bcm2835: Use 0x4 prefix for DMA bus addresses to SDRAM.

2015-05-05 Thread Noralf Trønnes
Den 05.05.2015 02:07, skrev Eric Anholt: Noralf Trønnes writes: Den 04.05.2015 21:33, skrev Eric Anholt: There exists a tiny MMU, configurable only by the VC (running the closed firmware), which maps from the ARM's physical addresses to bus addresses. These bus addresses determine the cachin

Re: [PATCH] ARM: bcm2835: Use 0x4 prefix for DMA bus addresses to SDRAM.

2015-05-04 Thread Eric Anholt
Noralf Trønnes writes: > Den 04.05.2015 21:33, skrev Eric Anholt: >> There exists a tiny MMU, configurable only by the VC (running the >> closed firmware), which maps from the ARM's physical addresses to bus >> addresses. These bus addresses determine the caching behavior in the >> VC's L1/L2 (n

Re: [PATCH] ARM: bcm2835: Use 0x4 prefix for DMA bus addresses to SDRAM.

2015-05-04 Thread Noralf Trønnes
Den 04.05.2015 21:33, skrev Eric Anholt: There exists a tiny MMU, configurable only by the VC (running the closed firmware), which maps from the ARM's physical addresses to bus addresses. These bus addresses determine the caching behavior in the VC's L1/L2 (note: separate from the ARM's L1/L2)

[PATCH] ARM: bcm2835: Use 0x4 prefix for DMA bus addresses to SDRAM.

2015-05-04 Thread Eric Anholt
There exists a tiny MMU, configurable only by the VC (running the closed firmware), which maps from the ARM's physical addresses to bus addresses. These bus addresses determine the caching behavior in the VC's L1/L2 (note: separate from the ARM's L1/L2) according to the top 2 bits. The bits in th