Re: [PATCH] ARM: don't print missing L2 cache as error

2016-02-16 Thread Russell King - ARM Linux
On Mon, Feb 15, 2016 at 07:19:20PM -0800, Stefan Agner wrote: > Hi Russel, > > Any comment to this? Currently the kernel prints an error message as > follows on the platform at hand: > [0.00] L2C: failed to init: -19 An alternative patch (8499/1) is queued for the next merge window, as

Re: [PATCH] ARM: don't print missing L2 cache as error

2016-02-16 Thread Russell King - ARM Linux
On Mon, Feb 15, 2016 at 07:19:20PM -0800, Stefan Agner wrote: > Hi Russel, > > Any comment to this? Currently the kernel prints an error message as > follows on the platform at hand: > [0.00] L2C: failed to init: -19 An alternative patch (8499/1) is queued for the next merge window, as

Re: [PATCH] ARM: don't print missing L2 cache as error

2016-02-15 Thread Stefan Agner
Hi Russel, Any comment to this? Currently the kernel prints an error message as follows on the platform at hand: [0.00] L2C: failed to init: -19 -- Stefan On 2016-01-27 17:27, Stefan Agner wrote: > Not having a L2 cache controller is a shame, but not an error. Avoid > printing an error

Re: [PATCH] ARM: don't print missing L2 cache as error

2016-02-15 Thread Stefan Agner
Hi Russel, Any comment to this? Currently the kernel prints an error message as follows on the platform at hand: [0.00] L2C: failed to init: -19 -- Stefan On 2016-01-27 17:27, Stefan Agner wrote: > Not having a L2 cache controller is a shame, but not an error. Avoid > printing an error

[PATCH] ARM: don't print missing L2 cache as error

2016-01-27 Thread Stefan Agner
Not having a L2 cache controller is a shame, but not an error. Avoid printing an error message if L2 controller initialization returns with ENODEV. Signed-off-by: Stefan Agner --- Hi Russel, We use a multiplatform kernel for two similar SoC's, one with L2 cache the other without. Maybe silently

[PATCH] ARM: don't print missing L2 cache as error

2016-01-27 Thread Stefan Agner
Not having a L2 cache controller is a shame, but not an error. Avoid printing an error message if L2 controller initialization returns with ENODEV. Signed-off-by: Stefan Agner --- Hi Russel, We use a multiplatform kernel for two similar SoC's, one with L2 cache the other