Re: [PATCH] ARM: dts: vf610: use reset values for L2 cache latencies

2015-12-11 Thread Shawn Guo
On Mon, Nov 30, 2015 at 05:59:26PM -0800, Stefan Agner wrote: > Linux on Vybrid used several different L2 latencies so far, none > of them seem to be the right ones. According to the application note > AN4947 ("Understanding Vybrid Architecture"), the tag portion runs > on CPU clock and is inside

Re: [PATCH] ARM: dts: vf610: use reset values for L2 cache latencies

2015-12-11 Thread Shawn Guo
On Mon, Nov 30, 2015 at 05:59:26PM -0800, Stefan Agner wrote: > Linux on Vybrid used several different L2 latencies so far, none > of them seem to be the right ones. According to the application note > AN4947 ("Understanding Vybrid Architecture"), the tag portion runs > on CPU clock and is inside

Re: [PATCH] ARM: dts: vf610: use reset values for L2 cache latencies

2015-12-02 Thread Stefan Agner
On 2015-12-02 00:13, Shawn Guo wrote: > On Mon, Nov 30, 2015 at 05:59:26PM -0800, Stefan Agner wrote: >> Linux on Vybrid used several different L2 latencies so far, none >> of them seem to be the right ones. According to the application note >> AN4947 ("Understanding Vybrid Architecture"), the tag

Re: [PATCH] ARM: dts: vf610: use reset values for L2 cache latencies

2015-12-02 Thread Shawn Guo
On Mon, Nov 30, 2015 at 05:59:26PM -0800, Stefan Agner wrote: > Linux on Vybrid used several different L2 latencies so far, none > of them seem to be the right ones. According to the application note > AN4947 ("Understanding Vybrid Architecture"), the tag portion runs > on CPU clock and is inside

Re: [PATCH] ARM: dts: vf610: use reset values for L2 cache latencies

2015-12-02 Thread Stefan Agner
On 2015-12-02 00:13, Shawn Guo wrote: > On Mon, Nov 30, 2015 at 05:59:26PM -0800, Stefan Agner wrote: >> Linux on Vybrid used several different L2 latencies so far, none >> of them seem to be the right ones. According to the application note >> AN4947 ("Understanding Vybrid Architecture"), the tag

Re: [PATCH] ARM: dts: vf610: use reset values for L2 cache latencies

2015-12-02 Thread Shawn Guo
On Mon, Nov 30, 2015 at 05:59:26PM -0800, Stefan Agner wrote: > Linux on Vybrid used several different L2 latencies so far, none > of them seem to be the right ones. According to the application note > AN4947 ("Understanding Vybrid Architecture"), the tag portion runs > on CPU clock and is inside

[PATCH] ARM: dts: vf610: use reset values for L2 cache latencies

2015-11-30 Thread Stefan Agner
Linux on Vybrid used several different L2 latencies so far, none of them seem to be the right ones. According to the application note AN4947 ("Understanding Vybrid Architecture"), the tag portion runs on CPU clock and is inside the L2 cache controller, whereas the data portion is stored in the

[PATCH] ARM: dts: vf610: use reset values for L2 cache latencies

2015-11-30 Thread Stefan Agner
Linux on Vybrid used several different L2 latencies so far, none of them seem to be the right ones. According to the application note AN4947 ("Understanding Vybrid Architecture"), the tag portion runs on CPU clock and is inside the L2 cache controller, whereas the data portion is stored in the