For new Instruction Prefixes XACQUIRE and XRELEASE to enable kernel to use
the new memory model that affects the critical sections with a hope to enable
atomic memory concurrency in the absence of data conflicts based on description
in chapter 12 of Intel SDM optimization guide. My understanding
For new Instruction Prefixes XACQUIRE and XRELEASE to enable kernel to use
the new memory model that affects the critical sections with a hope to enable
atomic memory concurrency in the absence of data conflicts based on description
in chapter 12 of Intel SDM optimization guide. My understanding
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