[PATCH] Extended interrupt LVT support for AMD Barcelona

2007-11-26 Thread Robert Richter
This patch adds extended interrupt support for AMD Barcelona CPUs. The patch provides functions to setup MCE and IBS interrupt vectors. Compared to the previous K8 implementation the vector offsets are centrally handled now in apic_64.c. Thus, the APIC setup code is responsible for vector

Re: [PATCH] Extended interrupt LVT support for AMD Barcelona

2007-11-26 Thread Andrew Morton
On Fri, 16 Nov 2007 16:11:34 +0100 "Robert Richter" <[EMAIL PROTECTED]> wrote: > This patch adds extended interrupt support for AMD Barcelona CPUs. The > patch provides functions to setup MCE and IBS interrupt > vectors. Compared to the previous K8 implementation the vector offsets > are

Re: [PATCH] Extended interrupt LVT support for AMD Barcelona

2007-11-26 Thread Andrew Morton
On Fri, 16 Nov 2007 16:11:34 +0100 Robert Richter [EMAIL PROTECTED] wrote: This patch adds extended interrupt support for AMD Barcelona CPUs. The patch provides functions to setup MCE and IBS interrupt vectors. Compared to the previous K8 implementation the vector offsets are centrally

[PATCH] Extended interrupt LVT support for AMD Barcelona

2007-11-26 Thread Robert Richter
This patch adds extended interrupt support for AMD Barcelona CPUs. The patch provides functions to setup MCE and IBS interrupt vectors. Compared to the previous K8 implementation the vector offsets are centrally handled now in apic_64.c. Thus, the APIC setup code is responsible for vector

[PATCH] Extended interrupt LVT support for AMD Barcelona

2007-11-20 Thread Robert Richter
This patch adds extended interrupt support for AMD Barcelona CPUs. The patch provides functions to setup MCE and IBS interrupt vectors. Compared to the previous K8 implementation the vector offsets are centrally handled now in apic_64.c. Thus, the APIC setup code is responsible for vector

[PATCH] Extended interrupt LVT support for AMD Barcelona

2007-11-20 Thread Robert Richter
This patch adds extended interrupt support for AMD Barcelona CPUs. The patch provides functions to setup MCE and IBS interrupt vectors. Compared to the previous K8 implementation the vector offsets are centrally handled now in apic_64.c. Thus, the APIC setup code is responsible for vector