2016-05-31 17:38+0300, Dmitry Bilunov:
> Intel CPUs having Turbo Boost feature implement an MSR to provide a
> control interface via rdmsr/wrmsr instructions. One could detect the
> presence of this feature by issuing one of these instructions and
> handling the #GP exception which is generated in
Intel CPUs having Turbo Boost feature implement an MSR to provide a
control interface via rdmsr/wrmsr instructions. One could detect the
presence of this feature by issuing one of these instructions and
handling the #GP exception which is generated in case the referenced MSR
is not implemented by t
2016-05-31 03:53-0400, Paolo Bonzini:
> > 2016-05-27 17:22+0200, Radim Krčmář:
> > > (I wonder why MacOS X doesn't read IA32_PERF_STATUS, though.)
> >
> > Oh, it maybe does ... we already emulate status and return 0x1000 in its
> > bottom 16 bits. I have no idea what is that supposed to mean, but
> 2016-05-27 17:22+0200, Radim Krčmář:
> > (I wonder why MacOS X doesn't read IA32_PERF_STATUS, though.)
>
> Oh, it maybe does ... we already emulate status and return 0x1000 in its
> bottom 16 bits. I have no idea what is that supposed to mean, but I
> think we should return 0x1000 in IA32_PERF_
2016-05-27 17:22+0200, Radim Krčmář:
> (I wonder why MacOS X doesn't read IA32_PERF_STATUS, though.)
Oh, it maybe does ... we already emulate status and return 0x1000 in its
bottom 16 bits. I have no idea what is that supposed to mean, but I
think we should return 0x1000 in IA32_PERF_CTL then.
(
2016-05-26 10:32+0300, km...@yandex-team.ru:
> From: Dmitry Bilunov
>
> Intel CPUs having Turbo Boost feature implement an MSR to provide a
> control interface via rdmsr/wrmsr instructions. One could detect the
> presence of this feature by issuing one of these instructions and
> handling the #GP
2016-05-27 09:49+0300, km...@yandex-team.ru:
> 26.05.2016, 23:44, "Gabriel L. Somlo" :
>> On Thu, May 26, 2016 at 10:39:31PM +0200, Radim Krčmář wrote:
>>> 2016-05-26 10:32+0300, km...@yandex-team.ru:
>>> > This patch implements a dummy handler for MSR_IA32_PERF_CTL to avoid the
>>> > crashes. M
On Thu, May 26, 2016 at 10:39:31PM +0200, Radim Krčmář wrote:
> 2016-05-26 10:32+0300, km...@yandex-team.ru:
> > From: Dmitry Bilunov
> >
> > Intel CPUs having Turbo Boost feature implement an MSR to provide a
> > control interface via rdmsr/wrmsr instructions. One could detect the
> > presence o
2016-05-26 10:32+0300, km...@yandex-team.ru:
> From: Dmitry Bilunov
>
> Intel CPUs having Turbo Boost feature implement an MSR to provide a
> control interface via rdmsr/wrmsr instructions. One could detect the
> presence of this feature by issuing one of these instructions and
> handling the #GP
From: Dmitry Bilunov
Intel CPUs having Turbo Boost feature implement an MSR to provide a
control interface via rdmsr/wrmsr instructions. One could detect the
presence of this feature by issuing one of these instructions and
handling the #GP exception which is generated in case the referenced MSR
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