On Mon, 7 Nov 2016, Leonid Yegoshin wrote:
> MIPS R2 emulation doesn't take into account that BLEZL and BGTZL instructions
> require register RT = 0. If it is not zero it can be some legitimate MIPS R6
> instruction.
Well, it *is* rather than just can be -- one of BLEZC/BGEZC/BGEC or
BGTZC/BLTZ
MIPS R2 emulation doesn't take into account that BLEZL and BGTZL instructions
require register RT = 0. If it is not zero it can be some legitimate MIPS R6
instruction.
Problem happens after emulation optimization then emulation routine tries
to pipeline emulation and after emulation of one instruc
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