Re: [PATCH] MIPS: c-r4k: fix data corruption related to cache coherence.

On Thu, Apr 26, 2018 at 08:00:18AM +1000, NeilBrown wrote: > On Wed, Apr 25 2018, James Hogan wrote: > > So I'm thinking "!mips_cm_present()" should probably be replaced with > > "!r4k_op_needs_ipi(R4K_INDEX)" (and the comment updated to mention that > > IPI calls aren't implemented here). > >

Re: [PATCH] MIPS: c-r4k: fix data corruption related to cache coherence.

On Thu, Apr 26, 2018 at 08:00:18AM +1000, NeilBrown wrote: > On Wed, Apr 25 2018, James Hogan wrote: > > So I'm thinking "!mips_cm_present()" should probably be replaced with > > "!r4k_op_needs_ipi(R4K_INDEX)" (and the comment updated to mention that > > IPI calls aren't implemented here). > >

Re: [PATCH] MIPS: c-r4k: fix data corruption related to cache coherence.

On Wed, Apr 25 2018, James Hogan wrote: > Hi NeilBrown, > > On Wed, Apr 25, 2018 at 02:08:15PM +1000, NeilBrown wrote: >> Cc: sta...@vger.kernel.org (v4.8) > > FYI my preferred form of this is: > > Cc: # 4.8+ Ugh. Cc: looks like an RFC822 header, and # does not

Re: [PATCH] MIPS: c-r4k: fix data corruption related to cache coherence.

On Wed, Apr 25 2018, James Hogan wrote: > Hi NeilBrown, > > On Wed, Apr 25, 2018 at 02:08:15PM +1000, NeilBrown wrote: >> Cc: sta...@vger.kernel.org (v4.8) > > FYI my preferred form of this is: > > Cc: # 4.8+ Ugh. Cc: looks like an RFC822 header, and # does not introduce a comment in RFC822

Re: [PATCH] MIPS: c-r4k: fix data corruption related to cache coherence.

Hi NeilBrown, On Wed, Apr 25, 2018 at 02:08:15PM +1000, NeilBrown wrote: > Cc: sta...@vger.kernel.org (v4.8) FYI my preferred form of this is: Cc: # 4.8+ > /* >* Either no secondary cache or the available caches don't have the >* subset property

Re: [PATCH] MIPS: c-r4k: fix data corruption related to cache coherence.

Hi NeilBrown, On Wed, Apr 25, 2018 at 02:08:15PM +1000, NeilBrown wrote: > Cc: sta...@vger.kernel.org (v4.8) FYI my preferred form of this is: Cc: # 4.8+ > /* >* Either no secondary cache or the available caches don't have the >* subset property so we have to flush the

[PATCH] MIPS: c-r4k: fix data corruption related to cache coherence.

When DMA is to be performed to a MIPS32 1004K CPS, the L1-cache for the range needs to be flushed and invalidated first. The code currently takes one of two approaches. 1/ If the range is less than the size of the dcache, then HIT type requests flush/invalidate cache lines for the

[PATCH] MIPS: c-r4k: fix data corruption related to cache coherence.

When DMA is to be performed to a MIPS32 1004K CPS, the L1-cache for the range needs to be flushed and invalidated first. The code currently takes one of two approaches. 1/ If the range is less than the size of the dcache, then HIT type requests flush/invalidate cache lines for the