Re: [PATCH] MIPS: cevt-r4k: Enable intimer for Loongson64 CPUs with extimer

2020-10-04 Thread Paul Cercueil
Hi, Le mer. 23 sept. 2020 à 19:02, Jiaxun Yang a écrit : Loongson64C and Loongson64G have extimer feature, which is a timer sharing Cause.TI with cevt-r4k (named intimer). To ensure the cevt-r4k's usability, we need to add a callback for clock device to switch intimer. Signed-off-by: Jiaxun

Re: [PATCH] MIPS: cevt-r4k: Enable intimer for Loongson64 CPUs with extimer

2020-10-04 Thread Thomas Bogendoerfer
On Sat, Oct 03, 2020 at 02:25:42PM +0800, Jiaxun Yang wrote: > > > 于 2020年10月2日 GMT+08:00 下午9:27:21, Thomas Bogendoerfer > 写到: > >On Wed, Sep 23, 2020 at 07:02:54PM +0800, Jiaxun Yang wrote: > >> > >> +#ifdef CONFIG_CPU_LOONGSON64 > >> +static int c0_compare_int_enable(struct

Re: [PATCH] MIPS: cevt-r4k: Enable intimer for Loongson64 CPUs with extimer

2020-10-03 Thread Jiaxun Yang
于 2020年10月2日 GMT+08:00 下午9:27:21, Thomas Bogendoerfer 写到: >On Wed, Sep 23, 2020 at 07:02:54PM +0800, Jiaxun Yang wrote: >> >> +#ifdef CONFIG_CPU_LOONGSON64 >> +static int c0_compare_int_enable(struct clock_event_device *cd) >> +{ >> +if (cpu_has_extimer) >> +

Re: [PATCH] MIPS: cevt-r4k: Enable intimer for Loongson64 CPUs with extimer

2020-10-02 Thread Thomas Bogendoerfer
On Wed, Sep 23, 2020 at 07:02:54PM +0800, Jiaxun Yang wrote: > > +#ifdef CONFIG_CPU_LOONGSON64 > +static int c0_compare_int_enable(struct clock_event_device *cd) > +{ > + if (cpu_has_extimer) > + set_c0_config6(LOONGSON_CONF6_INTIMER); why are you not simply do this in

[PATCH] MIPS: cevt-r4k: Enable intimer for Loongson64 CPUs with extimer

2020-09-23 Thread Jiaxun Yang
Loongson64C and Loongson64G have extimer feature, which is a timer sharing Cause.TI with cevt-r4k (named intimer). To ensure the cevt-r4k's usability, we need to add a callback for clock device to switch intimer. Signed-off-by: Jiaxun Yang --- arch/mips/include/asm/cpu-features.h | 4