Add regs-rtc.h to replace the macros of redundancy.

Signed-off-by: Yang Ling <gnayg...@gmail.com>
---
 arch/mips/include/asm/mach-loongson32/regs-rtc.h | 23 +++++++++++++++++++++++
 arch/mips/loongson32/common/platform.c           | 23 ++++++++++-------------
 2 files changed, 33 insertions(+), 13 deletions(-)
 create mode 100644 arch/mips/include/asm/mach-loongson32/regs-rtc.h

diff --git a/arch/mips/include/asm/mach-loongson32/regs-rtc.h 
b/arch/mips/include/asm/mach-loongson32/regs-rtc.h
new file mode 100644
index 0000000..1fe724b
--- /dev/null
+++ b/arch/mips/include/asm/mach-loongson32/regs-rtc.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2016 Yang Ling <gnayg...@gmail.com>
+ *
+ * Loongson 1 RTC timer Register Definitions.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under  the terms of the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __ASM_MACH_LOONGSON32_REGS_RTC_H
+#define __ASM_MACH_LOONGSON32_REGS_RTC_H
+
+#define LS1X_RTC_REG(x) \
+               ((void __iomem *)KSEG1ADDR(LS1X_RTC_BASE + (x)))
+
+#define LS1X_RTC_CTRL  LS1X_RTC_REG(0x40)
+
+#define RTC_EXTCLK_OK  (BIT(5) | BIT(8))
+#define RTC_EXTCLK_EN  BIT(8)
+
+#endif /* __ASM_MACH_LOONGSON32_REGS_RTC_H */
diff --git a/arch/mips/loongson32/common/platform.c 
b/arch/mips/loongson32/common/platform.c
index beff085..193a84d 100644
--- a/arch/mips/loongson32/common/platform.c
+++ b/arch/mips/loongson32/common/platform.c
@@ -22,10 +22,7 @@
 #include <cpufreq.h>
 #include <dma.h>
 #include <nand.h>
-
-#define LS1X_RTC_CTRL  ((void __iomem *)KSEG1ADDR(LS1X_RTC_BASE + 0x40))
-#define RTC_EXTCLK_OK  (BIT(5) | BIT(8))
-#define RTC_EXTCLK_EN  BIT(8)
+#include <regs-rtc.h>
 
 /* 8250/16550 compatible UART */
 #define LS1X_UART(_id)                                         \
@@ -70,15 +67,6 @@ void __init ls1x_serial_set_uartclk(struct platform_device 
*pdev)
                p->uartclk = clk_get_rate(clk);
 }
 
-void __init ls1x_rtc_set_extclk(struct platform_device *pdev)
-{
-       u32 val;
-
-       val = __raw_readl(LS1X_RTC_CTRL);
-       if (!(val & RTC_EXTCLK_OK))
-               __raw_writel(val | RTC_EXTCLK_EN, LS1X_RTC_CTRL);
-}
-
 /* CPUFreq */
 static struct plat_ls1x_cpufreq ls1x_cpufreq_pdata = {
        .clk_name       = "cpu_clk",
@@ -357,6 +345,15 @@ struct platform_device ls1x_ehci_pdev = {
 };
 
 /* Real Time Clock */
+void __init ls1x_rtc_set_extclk(struct platform_device *pdev)
+{
+       u32 val;
+
+       val = __raw_readl(LS1X_RTC_CTRL);
+       if (!(val & RTC_EXTCLK_OK))
+               __raw_writel(val | RTC_EXTCLK_EN, LS1X_RTC_CTRL);
+}
+
 struct platform_device ls1x_rtc_pdev = {
        .name           = "ls1x-rtc",
        .id             = -1,
-- 
1.9.1

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