On Sat, Oct 07, 2017 at 02:08:44PM +0200, Bodo-Merle Sandor wrote:
> From: Sandor Bodo-Merle
>
> Add support for allocating multiple MSIs at the same time, so that the
> MSI_FLAG_MULTI_PCI_MSI flag can be added to the msi_domain_info
> structure.
>
> Avoid storing the hwirq in the low 5 bits of
Thanks, the change looks okay to me. It would be nice to test it on an
SMP system if possible. But I don't see how the change should break
existing support for IRQ affinity setting.
With that,
Reviewed-by: Ray Jui
Regards,
Ray
On 10/11/2017 1:26 AM, Sandor Bodo-Merle wrote:
Hi Ray,
we te
Hi Ray,
we tested on a custom board based on BCM56260. SMP affinity was not
tested as our board runs on a single core.
br,
Sandor
ps - sorry for the duplicate, but by default gmail sent out html
formatted mail :(
On Tue, Oct 10, 2017 at 8:09 PM, Ray Jui wrote:
> Hi Bodo,
>
>
> On 10/7/2017 5:
Hi Bodo,
On 10/7/2017 5:08 AM, Bodo-Merle Sandor wrote:
From: Sandor Bodo-Merle
Add support for allocating multiple MSIs at the same time, so that the
MSI_FLAG_MULTI_PCI_MSI flag can be added to the msi_domain_info
structure.
Avoid storing the hwirq in the low 5 bits of the message data, as i
From: Sandor Bodo-Merle
Add support for allocating multiple MSIs at the same time, so that the
MSI_FLAG_MULTI_PCI_MSI flag can be added to the msi_domain_info
structure.
Avoid storing the hwirq in the low 5 bits of the message data, as it is
used by the device. Also fix an endianness problem by
5 matches
Mail list logo