Re: [PATCH] Rockchip: RK3288: CRU: swap value of bit for CORE clock pll source selection

OK thanks 在 09/05/2014 03:32 PM, Heiko Stübner 写道: > Hi Jianqun, > > Am Freitag, 5. September 2014, 13:49:26 schrieb jianqun: >> From: xujianqun >> >> For RK3288, core clock pll source select APLL when bit value is 1, select >> GPLL when bit value is 0; >> >> CRU_CLKSEL0_CON [15] >> - core_clk_

Re: [PATCH] Rockchip: RK3288: CRU: swap value of bit for CORE clock pll source selection

Hi Jianqun, Am Freitag, 5. September 2014, 13:49:26 schrieb jianqun: > From: xujianqun > > For RK3288, core clock pll source select APLL when bit value is 1, select > GPLL when bit value is 0; > > CRU_CLKSEL0_CON [15] > - core_clk_pll_sel > - CORE clock pll source selection > -- 1'b1: select AR

[PATCH] Rockchip: RK3288: CRU: swap value of bit for CORE clock pll source selection

From: xujianqun For RK3288, core clock pll source select APLL when bit value is 1, select GPLL when bit value is 0; CRU_CLKSEL0_CON [15] - core_clk_pll_sel - CORE clock pll source selection -- 1'b1: select ARM PLL -- 1'b0: select GENERAL PLL BUG=none TEST= "cat /sys/kernel/debug/clk/clk_summary