On 2021/4/14 18:41, Catalin Marinas wrote:
On Wed, Apr 14, 2021 at 05:25:43PM +0800, Kai Shen wrote:
Performance decreases happen in __arch_clear_user when this
function is not correctly aligned on HISI-HIP08 arm64 SOC which
fetches 32 bytes (8 instructions) from icache with a 32-bytes
aligned
On Wed, Apr 14, 2021 at 05:25:43PM +0800, Kai Shen wrote:
> Performance decreases happen in __arch_clear_user when this
> function is not correctly aligned on HISI-HIP08 arm64 SOC which
> fetches 32 bytes (8 instructions) from icache with a 32-bytes
> aligned end address. As a result, if the hot
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