On 2016/9/15 5:01, Stephen Boyd wrote:
> On 09/12, Jiancheng Xue wrote:
>> Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset
>> Generator) module generates clock and reset signals used
>> by other module blocks on SoC.
>>
>> Signed-off-by: Jiancheng Xue
>
> Overall looks fine. Just a few ni
On 09/12, Jiancheng Xue wrote:
> Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset
> Generator) module generates clock and reset signals used
> by other module blocks on SoC.
>
> Signed-off-by: Jiancheng Xue
Overall looks fine. Just a few nitpicks.
> ---
> .../devicetree/bindings/clock/h
Hi all,
Sorry. I'll fixed this compiling error in the next version.
Regards,
Jiancheng
On 2016/9/12 21:55, kbuild test robot wrote:
> Hi Jiancheng,
>
> [auto build test ERROR on clk/clk-next]
> [also build test ERROR on v4.8-rc6 next-20160912]
> [if your patch is applied to the wrong git tree,
Hi Jiancheng,
[auto build test ERROR on clk/clk-next]
[also build test ERROR on v4.8-rc6 next-20160912]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
[Suggest to use git(>=2.9.0) format-patch --base= (or --base=auto for
convenience) to record
Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset
Generator) module generates clock and reset signals used
by other module blocks on SoC.
Signed-off-by: Jiancheng Xue
---
.../devicetree/bindings/clock/hi3519-crg.txt | 46
.../devicetree/bindings/clock/hisi-crg.txt | 49
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