Thanks, got it
Cheers,
Jia
On 11/20/2017 10:04 PM, Mark Rutland Wrote:
On Mon, Nov 20, 2017 at 09:50:15PM +0800, Jia He wrote:
On 11/20/2017 8:32 PM, Mark Rutland Wrote:
On Thu, Nov 16, 2017 at 06:27:28AM +, Jia He wrote:
Sometimes userspace need a high resolution cycle counter by read
On Mon, Nov 20, 2017 at 09:50:15PM +0800, Jia He wrote:
> On 11/20/2017 8:32 PM, Mark Rutland Wrote:
> > On Thu, Nov 16, 2017 at 06:27:28AM +, Jia He wrote:
> > > Sometimes userspace need a high resolution cycle counter by reading
> > > pmccntr_el0.
> > >
> > > In commit da4e4f18afe0 ("drivers
Hi Mark
Thanks for your review.
On 11/20/2017 8:32 PM, Mark Rutland Wrote:
Hi,
On Thu, Nov 16, 2017 at 06:27:28AM +, Jia He wrote:
Sometimes userspace need a high resolution cycle counter by reading
pmccntr_el0.
In commit da4e4f18afe0 ("drivers/perf: arm_pmu: implement CPU_PM
notifier")
Hi,
On Thu, Nov 16, 2017 at 06:27:28AM +, Jia He wrote:
> Sometimes userspace need a high resolution cycle counter by reading
> pmccntr_el0.
>
> In commit da4e4f18afe0 ("drivers/perf: arm_pmu: implement CPU_PM
> notifier"), it resets all the counters even when the pmcr_el0.E and
> pmcntenset_
Sometimes userspace need a high resolution cycle counter by reading
pmccntr_el0.
In commit da4e4f18afe0 ("drivers/perf: arm_pmu: implement CPU_PM
notifier"), it resets all the counters even when the pmcr_el0.E and
pmcntenset_el0.C are both 1 . That is incorrect.
We need to save the registers and
5 matches
Mail list logo