On 2017/11/17 19:13, Sudeep Holla wrote:
> On Fri, Nov 17, 2017 at 10:13:39AM +0800, Tan Xiaojun wrote:
>> On 2017/11/16 23:23, Sudeep Holla wrote:
>>>
>>> I assume L3 is outer non-architected system cache.
>>>
>>
>> Yes.
>>
>
> Good.
>
>> OK. That's fine. I will test this.
>
> Thanks.
>
>> By
On Fri, Nov 17, 2017 at 01:37:41PM +0800, Tan Xiaojun wrote:
> On 2017/11/17 10:13, Tan Xiaojun wrote:
> > On 2017/11/16 23:23, Sudeep Holla wrote:
[..]
> >>
> >> Let me know if the below patch works for you, I will submit it
> >> preferably with your tested-by.
> >>
> >> Regards,
> >> Sudeep
> >
On Fri, Nov 17, 2017 at 10:13:39AM +0800, Tan Xiaojun wrote:
> On 2017/11/16 23:23, Sudeep Holla wrote:
> >
> > I assume L3 is outer non-architected system cache.
> >
>
> Yes.
>
Good.
> OK. That's fine. I will test this.
Thanks.
> By the way, Arm64 tend to use acpi way to boot now. Is there
On 2017/11/17 10:13, Tan Xiaojun wrote:
> On 2017/11/16 23:23, Sudeep Holla wrote:
>>
>>
>> On 16/11/17 12:58, Tan Xiaojun wrote:
>>> Since commit dfea747d2aba ("drivers: base: cacheinfo: support DT
>>> overrides for cache properties"), we can set the correct cacheinfo
>>> via DT. But the cache typ
On 2017/11/16 23:23, Sudeep Holla wrote:
>
>
> On 16/11/17 12:58, Tan Xiaojun wrote:
>> Since commit dfea747d2aba ("drivers: base: cacheinfo: support DT
>> overrides for cache properties"), we can set the correct cacheinfo
>> via DT. But the cache type can't be set in the same way.
>>
>> I found
On 16/11/17 12:58, Tan Xiaojun wrote:
> Since commit dfea747d2aba ("drivers: base: cacheinfo: support DT
> overrides for cache properties"), we can set the correct cacheinfo
> via DT. But the cache type can't be set in the same way.
>
> I found this may be a problem in recent tests. I tested L3
Since commit dfea747d2aba ("drivers: base: cacheinfo: support DT
overrides for cache properties"), we can set the correct cacheinfo
via DT. But the cache type can't be set in the same way.
I found this may be a problem in recent tests. I tested L3 cache
node setting in DT in Hisilicon D03/D05 boar
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