(another late reply from me, sorry)
> +required:
> + - compatible
> + - reg
This is actually an older IP variant of what can be found in the Intel
LGM SoCs. The dt-bindings are currently being upstreamed for that newer
SoC in [0].
Based on "DOs and DON’Ts for designing and writing Devicetree
On Sun, Jan 03, 2021 at 11:18:03AM +0100, Aleksander Jan Bajkowski wrote:
> Document the Lantiq Xway SoC DMA Controller DT bindings.
>
> Signed-off-by: Aleksander Jan Bajkowski
> ---
> .../bindings/mips/lantiq/lantiq,dma-xway.yaml | 32 +++
> 1 file changed, 32 insertions(+)
>
On Sun, 03 Jan 2021 11:18:03 +0100, Aleksander Jan Bajkowski wrote:
> Document the Lantiq Xway SoC DMA Controller DT bindings.
>
> Signed-off-by: Aleksander Jan Bajkowski
> ---
> .../bindings/mips/lantiq/lantiq,dma-xway.yaml | 32 +++
> 1 file changed, 32 insertions(+)
> create
Document the Lantiq Xway SoC DMA Controller DT bindings.
Signed-off-by: Aleksander Jan Bajkowski
---
.../bindings/mips/lantiq/lantiq,dma-xway.yaml | 32 +++
1 file changed, 32 insertions(+)
create mode 100644
Documentation/devicetree/bindings/mips/lantiq/lantiq,dma-xway.yaml
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