On Tuesday, 28 July 2020, 13:20:15 CEST, David Laight wrote:
> From: Christian Eggers
>
> > {
> >
> > fram: fram@0 {
> > ...
> > mac_address_fec2: mac-address@126 {
> > reg = <0x126 6>;
> > };
> > ...
> > };
> > };
>
>
> H the
From: Christian Eggers
> Sent: 28 July 2020 11:30
>
> On Tuesday, 28 July 2020, 11:52:05 CEST, David Laight wrote:
> > From: Christian Eggers
> >
> > > Sent: 28 July 2020 10:30
> > >
> > > SPI eeproms are addressed by byte.
> >
> > They also support multi-byte writes - possibly with alignment
> >
On Tuesday, 28 July 2020, 11:52:05 CEST, David Laight wrote:
> From: Christian Eggers
>
> > Sent: 28 July 2020 10:30
> >
> > SPI eeproms are addressed by byte.
>
> They also support multi-byte writes - possibly with alignment
> restrictions.
> So forcing 4-byte writes (at aligned addresses)
From: Christian Eggers
> Sent: 28 July 2020 10:30
>
> SPI eeproms are addressed by byte.
They also support multi-byte writes - possibly with alignment
restrictions.
So forcing 4-byte writes (at aligned addresses) would typically
speed up writes by a factor of 4 over byte writes.
So does this
SPI eeproms are addressed by byte.
Signed-off-by: Christian Eggers
Cc: sta...@vger.kernel.org
---
drivers/misc/eeprom/at25.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/misc/eeprom/at25.c b/drivers/misc/eeprom/at25.c
index 0e7c8dc01195..4e57eb145fcc 100644
---
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