On Fri, 12 Sep 2014 10:36:07 -0700
"David E. Box" wrote:
> +#if IS_ENABLED(CONFIG_I2C_SHARED_CONTROLLER)
> +extern int i2c_acquire_ownership(struct device *dev);
> +extern int i2c_release_ownership(struct device *dev);
> +#endif
You can just have the prototypes anyway - no need for more ifdefs
On Fri, 12 Sep 2014 10:36:07 -0700
David E. Box david.e@linux.intel.com wrote:
+#if IS_ENABLED(CONFIG_I2C_SHARED_CONTROLLER)
+extern int i2c_acquire_ownership(struct device *dev);
+extern int i2c_release_ownership(struct device *dev);
+#endif
You can just have the prototypes anyway - no
On 2014/9/16 17:44, Mika Westerberg wrote:
> On Fri, Sep 12, 2014 at 10:36:07AM -0700, David E. Box wrote:
>> This patch implements an I2C bus sharing mechanism between the host and
>> platform
>> hardware on select Intel BayTrail SoC platforms using the XPower AXP288 PMIC.
>>
>> On these
On Tue, Sep 16, 2014 at 03:53:27AM -0700, Jacob Pan wrote:
> On Tue, 16 Sep 2014 12:44:49 +0300
> Mika Westerberg wrote:
>
> > Is this because we need to access the PMIC from host as well? I mean
> > from some PMIC driver (which driver btw)?
> >
> This is used by the X-Powers PMIC.
>
On Tue, 16 Sep 2014 12:44:49 +0300
Mika Westerberg wrote:
> Is this because we need to access the PMIC from host as well? I mean
> from some PMIC driver (which driver btw)?
>
This is used by the X-Powers PMIC.
https://lkml.org/lkml/2014/9/11/1016
> Otherwise it would be best to just detect
On Fri, Sep 12, 2014 at 10:36:07AM -0700, David E. Box wrote:
> This patch implements an I2C bus sharing mechanism between the host and
> platform
> hardware on select Intel BayTrail SoC platforms using the XPower AXP288 PMIC.
>
> On these platforms access to the PMIC must be shared with
On Fri, Sep 12, 2014 at 10:36:07AM -0700, David E. Box wrote:
This patch implements an I2C bus sharing mechanism between the host and
platform
hardware on select Intel BayTrail SoC platforms using the XPower AXP288 PMIC.
On these platforms access to the PMIC must be shared with platform
On Tue, 16 Sep 2014 12:44:49 +0300
Mika Westerberg mika.westerb...@linux.intel.com wrote:
Is this because we need to access the PMIC from host as well? I mean
from some PMIC driver (which driver btw)?
This is used by the X-Powers PMIC.
https://lkml.org/lkml/2014/9/11/1016
Otherwise it would
On Tue, Sep 16, 2014 at 03:53:27AM -0700, Jacob Pan wrote:
On Tue, 16 Sep 2014 12:44:49 +0300
Mika Westerberg mika.westerb...@linux.intel.com wrote:
Is this because we need to access the PMIC from host as well? I mean
from some PMIC driver (which driver btw)?
This is used by the
On 2014/9/16 17:44, Mika Westerberg wrote:
On Fri, Sep 12, 2014 at 10:36:07AM -0700, David E. Box wrote:
This patch implements an I2C bus sharing mechanism between the host and
platform
hardware on select Intel BayTrail SoC platforms using the XPower AXP288 PMIC.
On these platforms access
Hi Maxime,
On Mon, Sep 15, 2014 at 08:57:38AM +0200, Maxime Coquelin wrote:
> >+err = dev->acquire_ownership(dev->dev);
> Have you considered using hwspinlocks instead?
No, I've not used it before but it looks applicable here. I'll take a look.
> >@@ -212,6 +259,25 @@ static int
Hi David,
On 09/12/2014 07:36 PM, David E. Box wrote:
This patch implements an I2C bus sharing mechanism between the host and platform
hardware on select Intel BayTrail SoC platforms using the XPower AXP288 PMIC.
On these platforms access to the PMIC must be shared with platform hardware. The
Hi David,
On 09/12/2014 07:36 PM, David E. Box wrote:
This patch implements an I2C bus sharing mechanism between the host and platform
hardware on select Intel BayTrail SoC platforms using the XPower AXP288 PMIC.
On these platforms access to the PMIC must be shared with platform hardware. The
Hi Maxime,
On Mon, Sep 15, 2014 at 08:57:38AM +0200, Maxime Coquelin wrote:
+err = dev-acquire_ownership(dev-dev);
Have you considered using hwspinlocks instead?
No, I've not used it before but it looks applicable here. I'll take a look.
@@ -212,6 +259,25 @@ static int
This patch implements an I2C bus sharing mechanism between the host and platform
hardware on select Intel BayTrail SoC platforms using the XPower AXP288 PMIC.
On these platforms access to the PMIC must be shared with platform hardware. The
hardware unit assumes full control of the I2C bus and the
This patch implements an I2C bus sharing mechanism between the host and platform
hardware on select Intel BayTrail SoC platforms using the XPower AXP288 PMIC.
On these platforms access to the PMIC must be shared with platform hardware. The
hardware unit assumes full control of the I2C bus and the
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