Hello,
This patch against 2.6.20-git14 makes the NMI watchdog use PERFSEL1/PERFCTR1
instead of PERFSEL0/PERFCTR0 on processors supporting Intel architectural
perfmon, such as Intel Core 2. Although all PMU events can work on
both counters, the Precise Event-Based Sampling (PEBS) requires that the
On Monday 19 February 2007 17:36, Stephane Eranian wrote:
> Andi,
>
> On Sun, Feb 18, 2007 at 05:56:05PM +0100, Andi Kleen wrote:
> > On Saturday 17 February 2007 17:06, Stephane Eranian wrote:
> > > Hello,
> > >
> > > This patch against 2.6.20
> >
> > Please always submit against mainline:
> >
Andi,
On Sun, Feb 18, 2007 at 05:56:05PM +0100, Andi Kleen wrote:
> On Saturday 17 February 2007 17:06, Stephane Eranian wrote:
> > Hello,
> >
> > This patch against 2.6.20
>
> Please always submit against mainline:
>
Isn't 2.6.20 the latest mainline?
> patching file arch/i386/kernel/nmi.c
>
On Saturday 17 February 2007 17:06, Stephane Eranian wrote:
> Hello,
>
> This patch against 2.6.20
Please always submit against mainline:
patching file arch/i386/kernel/nmi.c
Hunk #1 FAILED at 288.
Hunk #2 succeeded at 740 (offset 55 lines).
Hunk #3 succeeded at 1017 with fuzz 1 (offset 59 line
Hello,
This patch against 2.6.20 makes the NMI watchdog use PERFSEL1/PERFCTR1
instead of PERFSEL0/PERFCTR0 on processors supporting Intel architectural
perfmon, such as Intel Core 2. Although all PMU events can work on
both counters, the Precise Event-Based Sampling (PEBS) requires that the
event
5 matches
Mail list logo