Re: [PATCH] iio: stm32 trigger: fix sampling_frequency read

2017-04-19 Thread Benjamin Gaignard
2017-04-07 13:53 GMT+02:00 Fabrice Gasnier : > When prescaler (PSC) is 0, it means div factor is 1: counter clock > frequency is equal to input clk / (PSC + 1). > When reload value is 8 for example, counter counts 9 cycles, from 0 to 8. > This is handled in frequency write routine, by writing respe

[PATCH] iio: stm32 trigger: fix sampling_frequency read

2017-04-07 Thread Fabrice Gasnier
When prescaler (PSC) is 0, it means div factor is 1: counter clock frequency is equal to input clk / (PSC + 1). When reload value is 8 for example, counter counts 9 cycles, from 0 to 8. This is handled in frequency write routine, by writing respectively: - prescaler - 1 to PSC - reload value - 1 to