Thanks, I found the cause, the delta patch is submitted. Lan7430 runs now in
different speeds, also ‚hot swap‘ between different speeds works well. Normal
mode and fixed-phy mode coexist properly.
So, I guess we’re done :) However, I’ll spend some more time testing to ensure
we’re really safe.
I’m testing with Microchip Lan7430, which is an integrated circuit that
contains MAC and PHY in one package. With the release kernel the hardware works
fine, so the overall configuration is ok (jumpers).
I will verify wether the effective RGMII and delay settings, you mention, are
equal in
On Wed, Jun 03, 2020 at 06:33:28PM +0200, Roelof Berg wrote:
> Ok, let's proceed :) The code runs well, dmesg looks good, ip addr shows me a
> link up, speed/duplex looks ok. But it does not transfer any data.
>
> Debugging steps (A/B versions):
> - Check clocks with oscilloscope (10/100/1000)
>
On Wed, Jun 03, 2020 at 06:36:28PM +0200, Roelof Berg wrote:
> If I find a fix, would I need to submit a delta patch (to our last one) or a
> full patch ?
A delta.
Andrew
If I find a fix, would I need to submit a delta patch (to our last one) or a
full patch ?
Thanks.
> So lets try to fix it.
>
>Thanks
> Andrew
>
Ok, let's proceed :) The code runs well, dmesg looks good, ip addr shows me a
link up, speed/duplex looks ok. But it does not transfer any data.
Debugging steps (A/B versions):
- Check clocks with oscilloscope (10/100/1000)
- Dump actual register settings
- Trace Phy-Phy autonegotiation and
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