On Wed, Nov 14, 2012 at 10:48:54AM +, Charles Keepax wrote:
> On Wed, Nov 14, 2012 at 10:20:09AM +0900, Mark Brown wrote:
> > Just do a sync, make sure that we mark the map as dirty when we do the
> > reset via register write and it'll not have any effect anyway. We
> > should also check if
On Wed, Nov 14, 2012 at 10:20:09AM +0900, Mark Brown wrote:
> On Tue, Nov 13, 2012 at 01:12:19PM +, Charles Keepax wrote:
> > On Tue, Nov 13, 2012 at 02:56:20PM +0900, Mark Brown wrote:
>
> > > No, we should never write to the chip until we have successfully
> > > identified it. Do a sync or
On Wed, Nov 14, 2012 at 10:20:09AM +0900, Mark Brown wrote:
On Tue, Nov 13, 2012 at 01:12:19PM +, Charles Keepax wrote:
On Tue, Nov 13, 2012 at 02:56:20PM +0900, Mark Brown wrote:
No, we should never write to the chip until we have successfully
identified it. Do a sync or similar
On Wed, Nov 14, 2012 at 10:48:54AM +, Charles Keepax wrote:
On Wed, Nov 14, 2012 at 10:20:09AM +0900, Mark Brown wrote:
Just do a sync, make sure that we mark the map as dirty when we do the
reset via register write and it'll not have any effect anyway. We
should also check if we've
On Tue, Nov 13, 2012 at 01:12:19PM +, Charles Keepax wrote:
> On Tue, Nov 13, 2012 at 02:56:20PM +0900, Mark Brown wrote:
> > No, we should never write to the chip until we have successfully
> > identified it. Do a sync or similar instead (we should be triggering
> > this very soon
On Tue, Nov 13, 2012 at 02:56:20PM +0900, Mark Brown wrote:
> On Mon, Nov 12, 2012 at 05:56:48PM +, Charles Keepax wrote:
> > In the absence of a physical reset line the chip is reset by writing the
> > first register, this was done after the register patch was applied which
> > negates the
On Tue, Nov 13, 2012 at 02:56:20PM +0900, Mark Brown wrote:
On Mon, Nov 12, 2012 at 05:56:48PM +, Charles Keepax wrote:
In the absence of a physical reset line the chip is reset by writing the
first register, this was done after the register patch was applied which
negates the settings
On Tue, Nov 13, 2012 at 01:12:19PM +, Charles Keepax wrote:
On Tue, Nov 13, 2012 at 02:56:20PM +0900, Mark Brown wrote:
No, we should never write to the chip until we have successfully
identified it. Do a sync or similar instead (we should be triggering
this very soon afterwards via
On Mon, Nov 12, 2012 at 05:56:48PM +, Charles Keepax wrote:
> In the absence of a physical reset line the chip is reset by writing the
> first register, this was done after the register patch was applied which
> negates the settings applied in the register patch.
>
> This patch moves the
In the absence of a physical reset line the chip is reset by writing the
first register, this was done after the register patch was applied which
negates the settings applied in the register patch.
This patch moves the reset to take place before the register patch is
applied.
Signed-off-by:
In the absence of a physical reset line the chip is reset by writing the
first register, this was done after the register patch was applied which
negates the settings applied in the register patch.
This patch moves the reset to take place before the register patch is
applied.
Signed-off-by:
On Mon, Nov 12, 2012 at 05:56:48PM +, Charles Keepax wrote:
In the absence of a physical reset line the chip is reset by writing the
first register, this was done after the register patch was applied which
negates the settings applied in the register patch.
This patch moves the reset to
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