On Sat, Mar 02, 2013 at 08:13:35PM +0800, Graeme Gregory wrote:
> Should these also flow down into the various drivers for the IP blocks? eg.
> compatible = "ti,twl6035-regulator", "ti,palmas-regulator";
Ideally, in case there's chip specific issues.
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On 02/03/13 11:35, Mark Brown wrote:
> On Fri, Mar 01, 2013 at 12:34:40PM -0700, Stephen Warren wrote:
>
>> Is Palmas a family of chips rather than a single chip then? That
>> implies that the DT would need two compatible values, e.g.:
> Yes.
>
>> compatible = "ti,12345", "ti,palmas";
>> ... where
On Fri, Mar 01, 2013 at 12:34:40PM -0700, Stephen Warren wrote:
> Is Palmas a family of chips rather than a single chip then? That
> implies that the DT would need two compatible values, e.g.:
Yes.
> compatible = "ti,12345", "ti,palmas";
> ... where "12345" is the actual chip name.
> ... rathe
On 03/01/2013 06:16 AM, Mark Brown wrote:
> On Fri, Mar 01, 2013 at 06:25:24PM +0530, Laxman Dewangan wrote:
>> On Friday 01 March 2013 06:13 PM, Mark Brown wrote:
>
>>> This can't be a generic problem on ARM systems, I'm pretty sure
>>> the primary users of palmas would've noticed, this is more o
On Fri, Mar 01, 2013 at 06:25:24PM +0530, Laxman Dewangan wrote:
> On Friday 01 March 2013 06:13 PM, Mark Brown wrote:
> >This can't be a generic problem on ARM systems, I'm pretty sure the
> >primary users of palmas would've noticed, this is more of a new feature
> >isn't it?
> I think it is tes
On Friday 01 March 2013 06:13 PM, Mark Brown wrote:
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On Fri, Mar 01, 2013 at 06:04:56PM +0530, Laxman Dewangan wrote:
Currently driver sets the irq type to IRQF_TRIGGER_LOW which is
causing interrupt registration failure in ARM based SoCs as:
[0.208479] genirq
On Fri, Mar 01, 2013 at 06:04:56PM +0530, Laxman Dewangan wrote:
> Currently driver sets the irq type to IRQF_TRIGGER_LOW which is
> causing interrupt registration failure in ARM based SoCs as:
> [0.208479] genirq: Setting trigger mode 8 for irq 118 failed
> (gic_set_type+0x0/0xf0)
> [0.2
Currently driver sets the irq type to IRQF_TRIGGER_LOW which is
causing interrupt registration failure in ARM based SoCs as:
[0.208479] genirq: Setting trigger mode 8 for irq 118 failed
(gic_set_type+0x0/0xf0)
[0.208513] dummy 0-0059: Failed to request IRQ 118: -22
Provide the irq flags t
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