Re: [PATCH] mm: sort freelist by rank number

Hi KyongHo and David, On 07.08.20 09:08, Pekka Enberg wrote: > > > I think having more knowledge of DRAM controller details in the OS > > > would be potentially beneficial for better page allocation policy, so > > > maybe try come up with something more generic, even if the fallback to > > >

Re: [PATCH] mm: sort freelist by rank number

On Mon, Aug 10, 2020 at 09:32:18AM +0200, David Hildenbrand wrote: > On 07.08.20 09:08, Pekka Enberg wrote: > > Hi Cho and David, > > > > On Mon, Aug 3, 2020 at 10:57 AM David Hildenbrand wrote: > >> > >> On 03.08.20 08:10, pullip@samsung.com wrote: > >>> From: Cho KyongHo > >>> > >>>

Re: [PATCH] mm: sort freelist by rank number

On 07.08.20 09:08, Pekka Enberg wrote: > Hi Cho and David, > > On Mon, Aug 3, 2020 at 10:57 AM David Hildenbrand wrote: >> >> On 03.08.20 08:10, pullip@samsung.com wrote: >>> From: Cho KyongHo >>> >>> LPDDR5 introduces rank switch delay. If three successive DRAM accesses >>> happens and the

Re: [PATCH] mm: sort freelist by rank number

Hi Cho and David, On Mon, Aug 3, 2020 at 10:57 AM David Hildenbrand wrote: > > On 03.08.20 08:10, pullip@samsung.com wrote: > > From: Cho KyongHo > > > > LPDDR5 introduces rank switch delay. If three successive DRAM accesses > > happens and the first and the second ones access one rank and

Re: [PATCH] mm: sort freelist by rank number

On Tue, Aug 04, 2020 at 11:12:55AM +0200, Vlastimil Babka wrote: > On 8/4/20 4:35 AM, Cho KyongHo wrote: > > On Mon, Aug 03, 2020 at 05:45:55PM +0200, Vlastimil Babka wrote: > >> On 8/3/20 9:57 AM, David Hildenbrand wrote: > >> > On 03.08.20 08:10, pullip@samsung.com wrote: > >> >> From: Cho

Re: [PATCH] mm: sort freelist by rank number

On 8/4/20 4:35 AM, Cho KyongHo wrote: > On Mon, Aug 03, 2020 at 05:45:55PM +0200, Vlastimil Babka wrote: >> On 8/3/20 9:57 AM, David Hildenbrand wrote: >> > On 03.08.20 08:10, pullip@samsung.com wrote: >> >> From: Cho KyongHo >> >> >> >> LPDDR5 introduces rank switch delay. If three

Re: [PATCH] mm: sort freelist by rank number

On Mon, Aug 03, 2020 at 05:45:55PM +0200, Vlastimil Babka wrote: > On 8/3/20 9:57 AM, David Hildenbrand wrote: > > On 03.08.20 08:10, pullip@samsung.com wrote: > >> From: Cho KyongHo > >> > >> LPDDR5 introduces rank switch delay. If three successive DRAM accesses > >> happens and the first

Re: [PATCH] mm: sort freelist by rank number

On 8/3/20 9:57 AM, David Hildenbrand wrote: > On 03.08.20 08:10, pullip@samsung.com wrote: >> From: Cho KyongHo >> >> LPDDR5 introduces rank switch delay. If three successive DRAM accesses >> happens and the first and the second ones access one rank and the last >> access happens on the

Re: [PATCH] mm: sort freelist by rank number

Hi, On Mon, Aug 03, 2020 at 09:57:10AM +0200, David Hildenbrand wrote: > On 03.08.20 08:10, pullip@samsung.com wrote: > > From: Cho KyongHo > > > > LPDDR5 introduces rank switch delay. If three successive DRAM accesses > > happens and the first and the second ones access one rank and the

Re: [PATCH] mm: sort freelist by rank number

On 03.08.20 08:10, pullip@samsung.com wrote: > From: Cho KyongHo > > LPDDR5 introduces rank switch delay. If three successive DRAM accesses > happens and the first and the second ones access one rank and the last > access happens on the other rank, the latency of the last access will > be

[PATCH] mm: sort freelist by rank number

From: Cho KyongHo LPDDR5 introduces rank switch delay. If three successive DRAM accesses happens and the first and the second ones access one rank and the last access happens on the other rank, the latency of the last access will be longer than the second one. To address this panelty, we can