Ezequiel Garcia writes:
> Robert,
>
> On 24 August 2015 at 15:24, Robert Jarzmik wrote:
>> Ezequiel Garcia writes:
>>
>>> Should we worry about having two definitions for the same bit?
>>> Would it be too ugly to mix the two meaning? Something like this:
>>>
>>> /* This bit has two different me
Robert,
On 24 August 2015 at 15:24, Robert Jarzmik wrote:
> Ezequiel Garcia writes:
>
>> Should we worry about having two definitions for the same bit?
>> Would it be too ugly to mix the two meaning? Something like this:
>>
>> /* This bit has two different meanings on NFCv1 and NFCv2 */
>> #defi
Ezequiel Garcia writes:
> Should we worry about having two definitions for the same bit?
> Would it be too ugly to mix the two meaning? Something like this:
>
> /* This bit has two different meanings on NFCv1 and NFCv2 */
> #define NDCR_STOP_ON_UNCOR_ARB_CNTL (0x1 << 19)
I don't find that very pr
On 23 Aug 09:05 PM, Robert Jarzmik wrote:
> After the conversion of pxa architecture to common clock framework, the
> NAND clock can be disabled on driver exit.
>
> In this case, it happens that if the driver used the NAND and set the
> DFI arbitration bit, the next access to a static memory contr
After the conversion of pxa architecture to common clock framework, the
NAND clock can be disabled on driver exit.
In this case, it happens that if the driver used the NAND and set the
DFI arbitration bit, the next access to a static memory controller area,
such as an ethernet card, will stall the
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