Re: [PATCH] mtd: rawnand: mxc: set spare area size register explicitly

Hi Miquel, Thus wrote Miquel Raynal (miquel.ray...@bootlin.com): > > Usually, this register is updated from settings in the IIM fuses when > > the system is booting from nand flash. For other boot media, however, > s/nand/NAND ok > > + /* spare area size in 16bit words */ > I thought I unde

Re: [PATCH] mtd: rawnand: mxc: set spare area size register explicitly

Hi Martin, On Sun, 3 Jun 2018 13:31:35 +0200, Martin Kaiser wrote: > The v21 version of the NAND flash controller contains a Spare Area Size > Register (SPAS) at offset 0x10. Its setting defaults to the maximum > spare area size of 218 bytes. The size that is set in this register is > used by t

Re: [PATCH] mtd: rawnand: mxc: set spare area size register explicitly

On Sun, Jun 03, 2018 at 01:31:35PM +0200, Martin Kaiser wrote: > The v21 version of the NAND flash controller contains a Spare Area Size > Register (SPAS) at offset 0x10. Its setting defaults to the maximum > spare area size of 218 bytes. The size that is set in this register is > used by the contr

[PATCH] mtd: rawnand: mxc: set spare area size register explicitly

The v21 version of the NAND flash controller contains a Spare Area Size Register (SPAS) at offset 0x10. Its setting defaults to the maximum spare area size of 218 bytes. The size that is set in this register is used by the controller when it calculates the ECC bytes internally in hardware. Usually