Re: [PATCH] net/cadence/macb: clear interrupts simply and correctly

2014-06-18 Thread Jongsung Kim
On 06/17/2014 04:54 PM, Nicolas Ferre wrote: Hi Nicolas, > On 17/06/2014 05:39, Jongsung Kim : >> On 06/17/2014 06:28 AM, Sören Brinkmann wrote: >>> Shouldn't it be sufficient to replace 'MACB_BIT(RCOMP) with >>> 'MACB_RX_INT_FLAGS' >>> to clear all the RX IRQ flags. >> >> I'm afraid not. >> >>

Re: [PATCH] net/cadence/macb: clear interrupts simply and correctly

2014-06-17 Thread Nicolas Ferre
On 17/06/2014 05:39, Jongsung Kim : > On 06/17/2014 06:28 AM, Sören Brinkmann wrote: >> Shouldn't it be sufficient to replace 'MACB_BIT(RCOMP) with >> 'MACB_RX_INT_FLAGS' >> to clear all the RX IRQ flags. > > I'm afraid not. > > You know, this driver initially targeted only GEMs configured with

Re: [PATCH] net/cadence/macb: clear interrupts simply and correctly

2014-06-16 Thread Jongsung Kim
On 06/17/2014 12:50 PM, Sören Brinkmann wrote: > On Tue, 2014-06-17 at 11:38AM +0900, Jongsung Kim wrote: >> On 06/16/2014 11:56 PM, Sören Brinkmann wrote: >>> On Mon, 2014-06-16 at 02:00PM +0900, Jongsung Kim wrote: On 06/13/2014 12:44 AM, Sören Brinkmann wrote: > This is now clearing all

Re: [PATCH] net/cadence/macb: clear interrupts simply and correctly

2014-06-16 Thread Sören Brinkmann
On Tue, 2014-06-17 at 11:38AM +0900, Jongsung Kim wrote: > On 06/16/2014 11:56 PM, Sören Brinkmann wrote: > > On Mon, 2014-06-16 at 02:00PM +0900, Jongsung Kim wrote: > >> On 06/13/2014 12:44 AM, Sören Brinkmann wrote: > >>> This is now clearing all IRQ flags which is probably not what we want > >>

Re: [PATCH] net/cadence/macb: clear interrupts simply and correctly

2014-06-16 Thread Jongsung Kim
On 06/17/2014 06:28 AM, Sören Brinkmann wrote: > Shouldn't it be sufficient to replace 'MACB_BIT(RCOMP) with > 'MACB_RX_INT_FLAGS' > to clear all the RX IRQ flags. I'm afraid not. You know, this driver initially targeted only GEMs configured with "gem_irq_clear_read." For this implementation of

Re: [PATCH] net/cadence/macb: clear interrupts simply and correctly

2014-06-16 Thread Jongsung Kim
On 06/16/2014 11:56 PM, Sören Brinkmann wrote: > On Mon, 2014-06-16 at 02:00PM +0900, Jongsung Kim wrote: >> On 06/13/2014 12:44 AM, Sören Brinkmann wrote: >>> This is now clearing all IRQ flags which is probably not what we want >>> here. This is handling RX only. We still want the non-RX interrup

Re: [PATCH] net/cadence/macb: clear interrupts simply and correctly

2014-06-16 Thread Sören Brinkmann
On Thu, 2014-06-12 at 05:50PM +0900, Jongsung Kim wrote: > The "Rx used bit read" interrupt is enabled but not cleared for some > systems with the ISR (Interrupt Status Register) configured as clear- > on-write. This interrupt may be asserted when the CPU does not handle > Rx-complete interrupts fo

Re: [PATCH] net/cadence/macb: clear interrupts simply and correctly

2014-06-16 Thread Sören Brinkmann
On Mon, 2014-06-16 at 02:00PM +0900, Jongsung Kim wrote: > On 06/13/2014 12:44 AM, Sören Brinkmann wrote: > > Hi Jongsung, > > Hi Sören, > > > Does this interrupt need to be enabled? There is nothing checking > > that bit and handling this IRQ in the handler, AFAICT. And you solve > > this by sim

Re: [PATCH] net/cadence/macb: clear interrupts simply and correctly

2014-06-15 Thread Jongsung Kim
On 06/13/2014 12:44 AM, Sören Brinkmann wrote: > Hi Jongsung, Hi Sören, > Does this interrupt need to be enabled? There is nothing checking > that bit and handling this IRQ in the handler, AFAICT. And you solve > this by simply clearing the bit. So, I wonder whether not enabling this > IRQ in the

Re: [PATCH] net/cadence/macb: clear interrupts simply and correctly

2014-06-12 Thread Sören Brinkmann
Hi Jongsung, On Thu, 2014-06-12 at 05:50PM +0900, Jongsung Kim wrote: > The "Rx used bit read" interrupt is enabled but not cleared for some > systems with the ISR (Interrupt Status Register) configured as clear- > on-write. Does this interrupt need to be enabled? There is nothing checking that bi

[PATCH] net/cadence/macb: clear interrupts simply and correctly

2014-06-12 Thread Jongsung Kim
The "Rx used bit read" interrupt is enabled but not cleared for some systems with the ISR (Interrupt Status Register) configured as clear- on-write. This interrupt may be asserted when the CPU does not handle Rx-complete interrupts for a long time. (e.g., if the CPU is stopped by debugger) Once ass