From: Arnd Bergmann
Date: Fri, 26 Feb 2016 21:10:31 +0100
> On Friday 26 February 2016 22:05:09 Lada Trimasova wrote:
>> for (i = 0; i < len; i++, reg++) {
>> u32 buf = nps_enet_reg_get(priv,
>> NPS_ENET_REG_RX_BUF);
>> +
From: Arnd Bergmann
Date: Fri, 26 Feb 2016 21:10:31 +0100
> On Friday 26 February 2016 22:05:09 Lada Trimasova wrote:
>> for (i = 0; i < len; i++, reg++) {
>> u32 buf = nps_enet_reg_get(priv,
>> NPS_ENET_REG_RX_BUF);
>> + buf =
On Friday 26 February 2016 22:05:09 Lada Trimasova wrote:
>
> @@ -75,6 +86,7 @@ struct nps_enet_rx_ctl {
> * nr: Length in bytes of Rx frame loaded by MAC to Rx buffer
> */
> struct {
> +#ifdef CONFIG_CPU_BIG_ENDIAN
> u32
On Friday 26 February 2016 22:05:09 Lada Trimasova wrote:
>
> @@ -75,6 +86,7 @@ struct nps_enet_rx_ctl {
> * nr: Length in bytes of Rx frame loaded by MAC to Rx buffer
> */
> struct {
> +#ifdef CONFIG_CPU_BIG_ENDIAN
> u32
On Friday 26 February 2016 22:05:09 Lada Trimasova wrote:
> for (i = 0; i < len; i++, reg++) {
> u32 buf = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
> + buf = be32_to_cpu(buf);
> put_unaligned(buf, reg);
>
On Friday 26 February 2016 22:05:09 Lada Trimasova wrote:
> for (i = 0; i < len; i++, reg++) {
> u32 buf = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
> + buf = be32_to_cpu(buf);
> put_unaligned(buf, reg);
>
Since ezchip network driver is written with big endian EZChip platform it
is necessary to add support for little endian architecture.
The first issue is that big endian machines pack bitfields from
most significant byte to least as against little endian ones.
So this patch provides reversed order
Since ezchip network driver is written with big endian EZChip platform it
is necessary to add support for little endian architecture.
The first issue is that big endian machines pack bitfields from
most significant byte to least as against little endian ones.
So this patch provides reversed order
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