Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

Hi David, On Tuesday, 26 September 2017 21:53:21 PDT David Miller wrote: > From: Paul Burton > Date: Tue, 26 Sep 2017 21:30:56 -0700 > > > Nobody said that you are required to do anything, I suggested that > > it would be beneficial if you were to suggest a change to the

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

Hi David, On Tuesday, 26 September 2017 21:53:21 PDT David Miller wrote: > From: Paul Burton > Date: Tue, 26 Sep 2017 21:30:56 -0700 > > > Nobody said that you are required to do anything, I suggested that > > it would be beneficial if you were to suggest a change to the > > documented DMA API

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

From: Paul Burton Date: Tue, 26 Sep 2017 21:30:56 -0700 > Nobody said that you are required to do anything, I suggested that > it would be beneficial if you were to suggest a change to the > documented DMA API such that it allows your usage where it currently > does not.

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

From: Paul Burton Date: Tue, 26 Sep 2017 21:30:56 -0700 > Nobody said that you are required to do anything, I suggested that > it would be beneficial if you were to suggest a change to the > documented DMA API such that it allows your usage where it currently > does not. Documentation is often

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

Hi David, On Tuesday, 26 September 2017 19:52:44 PDT David Miller wrote: > From: Paul Burton > Date: Tue, 26 Sep 2017 14:30:33 -0700 > > > I'd suggest that at a minimum if you're unwilling to obey the API as > > described in Documentation/DMA-API.txt then it would be

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

Hi David, On Tuesday, 26 September 2017 19:52:44 PDT David Miller wrote: > From: Paul Burton > Date: Tue, 26 Sep 2017 14:30:33 -0700 > > > I'd suggest that at a minimum if you're unwilling to obey the API as > > described in Documentation/DMA-API.txt then it would be beneficial > > if you could

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

From: Paul Burton Date: Tue, 26 Sep 2017 14:30:33 -0700 > I'd suggest that at a minimum if you're unwilling to obey the API as > described in Documentation/DMA-API.txt then it would be beneficial > if you could propose a change to it such that it works for you, and >

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

From: Paul Burton Date: Tue, 26 Sep 2017 14:30:33 -0700 > I'd suggest that at a minimum if you're unwilling to obey the API as > described in Documentation/DMA-API.txt then it would be beneficial > if you could propose a change to it such that it works for you, and > perhaps we can extend the

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

Hi David, On Tuesday, 26 September 2017 13:33:09 PDT David Miller wrote: > From: Paul Burton > Date: Tue, 26 Sep 2017 11:48:19 -0700 > > >> The device writes into only the bytes it was given access to, which > >> starts at the DMA address. > > > > OK - still fine but

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

Hi David, On Tuesday, 26 September 2017 13:33:09 PDT David Miller wrote: > From: Paul Burton > Date: Tue, 26 Sep 2017 11:48:19 -0700 > > >> The device writes into only the bytes it was given access to, which > >> starts at the DMA address. > > > > OK - still fine but *only* if we don't write

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

From: Paul Burton Date: Tue, 26 Sep 2017 11:48:19 -0700 >> The device writes into only the bytes it was given access to, which >> starts at the DMA address. > > OK - still fine but *only* if we don't write to anything that happens to be > part of the cache lines that

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

From: Paul Burton Date: Tue, 26 Sep 2017 11:48:19 -0700 >> The device writes into only the bytes it was given access to, which >> starts at the DMA address. > > OK - still fine but *only* if we don't write to anything that happens to be > part of the cache lines that are only partially covered

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

Hi David, On Tuesday, 26 September 2017 10:34:00 PDT David Miller wrote: > From: Matt Redfearn > Date: Tue, 26 Sep 2017 14:57:39 +0100 > > > Since the MIPS architecture requires software cache management, > > performing a dma_map_single(TO_DEVICE) will writeback and

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

Hi David, On Tuesday, 26 September 2017 10:34:00 PDT David Miller wrote: > From: Matt Redfearn > Date: Tue, 26 Sep 2017 14:57:39 +0100 > > > Since the MIPS architecture requires software cache management, > > performing a dma_map_single(TO_DEVICE) will writeback and invalidate > > the

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

From: Matt Redfearn Date: Tue, 26 Sep 2017 14:57:39 +0100 > Since the MIPS architecture requires software cache management, > performing a dma_map_single(TO_DEVICE) will writeback and invalidate > the cachelines for the required region. To comply with (our >

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

From: Matt Redfearn Date: Tue, 26 Sep 2017 14:57:39 +0100 > Since the MIPS architecture requires software cache management, > performing a dma_map_single(TO_DEVICE) will writeback and invalidate > the cachelines for the required region. To comply with (our > interpretation of) the DMA API

RE: [PATCH] net: stmmac: Meet alignment requirements for DMA

From: Matt Redfearn > Sent: 26 September 2017 14:58 ... > > As long as you use the dma_{map,unamp}_single() and sync to/from > > deivce interfaces properly, the cacheline issues will be handled properly > > and the cpu and the device will see proper uptodate memory contents. > > I interpret the

RE: [PATCH] net: stmmac: Meet alignment requirements for DMA

From: Matt Redfearn > Sent: 26 September 2017 14:58 ... > > As long as you use the dma_{map,unamp}_single() and sync to/from > > deivce interfaces properly, the cacheline issues will be handled properly > > and the cpu and the device will see proper uptodate memory contents. > > I interpret the

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

Hi David, Thanks for your feedback. On 23/09/17 02:26, David Miller wrote: From: Matt Redfearn Date: Fri, 22 Sep 2017 12:13:53 +0100 According to Documentation/DMA-API.txt: Warnings: Memory coherency operates at a granularity called the cache line width. In

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

Hi David, Thanks for your feedback. On 23/09/17 02:26, David Miller wrote: From: Matt Redfearn Date: Fri, 22 Sep 2017 12:13:53 +0100 According to Documentation/DMA-API.txt: Warnings: Memory coherency operates at a granularity called the cache line width. In order for memory mapped by

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

From: Matt Redfearn Date: Fri, 22 Sep 2017 12:13:53 +0100 > According to Documentation/DMA-API.txt: > Warnings: Memory coherency operates at a granularity called the cache > line width. In order for memory mapped by this API to operate > correctly, the mapped

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

From: Matt Redfearn Date: Fri, 22 Sep 2017 12:13:53 +0100 > According to Documentation/DMA-API.txt: > Warnings: Memory coherency operates at a granularity called the cache > line width. In order for memory mapped by this API to operate > correctly, the mapped region must begin exactly on a

[PATCH] net: stmmac: Meet alignment requirements for DMA

According to Documentation/DMA-API.txt: Warnings: Memory coherency operates at a granularity called the cache line width. In order for memory mapped by this API to operate correctly, the mapped region must begin exactly on a cache line boundary and end exactly on one (to prevent two

[PATCH] net: stmmac: Meet alignment requirements for DMA

According to Documentation/DMA-API.txt: Warnings: Memory coherency operates at a granularity called the cache line width. In order for memory mapped by this API to operate correctly, the mapped region must begin exactly on a cache line boundary and end exactly on one (to prevent two