On Mon, Jul 15, 2019 at 12:28:05PM +0300, Maxim Levitsky wrote:
>
> To be honest, the spec explicitly states that minimum submission queue entry
> size is 64
> and minimum completion entry size should be is 16 bytes for NVM command set:
That doesn't keep Apple from implementing whatever they
On Mon, 2019-07-15 at 12:28 +0300, Maxim Levitsky wrote:
>
> To be honest, the spec explicitly states that minimum submission queue entry
> size is 64
> and minimum completion entry size should be is 16 bytes for NVM command set:
>
> "Bits 3:0 define the required (i.e., minimum) Submission
On Mon, 2019-07-15 at 19:03 +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2019-07-15 at 18:43 +1000, Benjamin Herrenschmidt wrote:
> > On Mon, 2019-07-15 at 10:10 +0200, Christoph Hellwig wrote:
> > > > + /*
> > > > +* Apple 2018 and latter variant has a few issues
> > > > +
On Mon, 2019-07-15 at 18:43 +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2019-07-15 at 10:10 +0200, Christoph Hellwig wrote:
> > > + /*
> > > + * Apple 2018 and latter variant has a few issues
> > > + */
> > > + NVME_QUIRK_APPLE_2018 = (1 << 10),
> >
> > We try to have
On Mon, 2019-07-15 at 10:10 +0200, Christoph Hellwig wrote:
> > + /*
> > +* Apple 2018 and latter variant has a few issues
> > +*/
> > + NVME_QUIRK_APPLE_2018 = (1 << 10),
>
> We try to have quirks for the actual issue, so this should be one quirk
> for the irq
> + /*
> + * Apple 2018 and latter variant has a few issues
> + */
> + NVME_QUIRK_APPLE_2018 = (1 << 10),
We try to have quirks for the actual issue, so this should be one quirk
for the irq vectors issues, and another for the sq entry size. Note that
NVMe
Based on reverse engineering and original patch by
Paul Pawlowski
This adds support for Apple weird implementation of NVME in their
2018 or later machines. It accounts for the twice-as-big SQ entries
for the IO queues, and the fact that only interrupt vector 0 appears
to function properly.
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