Re: [PATCH] pci: avoid unsync of LTR mechanism configuration

2021-01-17 Thread Mingchuang Qiao
On Tue, 2021-01-12 at 15:36 -0600, Bjorn Helgaas wrote: > Note subject line tips at > https://lore.kernel.org/r/20171026223701.ga25...@bhelgaas-glaptop.roam.corp.google.com > > On Tue, Jan 12, 2021 at 03:27:39PM +0800, mingchuang.q...@mediatek.com wrote: > > From: Mingchuang Qiao > > > > In

Re: [PATCH] pci: avoid unsync of LTR mechanism configuration

2021-01-12 Thread Bjorn Helgaas
Note subject line tips at https://lore.kernel.org/r/20171026223701.ga25...@bhelgaas-glaptop.roam.corp.google.com On Tue, Jan 12, 2021 at 03:27:39PM +0800, mingchuang.q...@mediatek.com wrote: > From: Mingchuang Qiao > > In pci bus scan flow, the LTR mechanism enable bit of DEVCTL2 register > is

[PATCH] pci: avoid unsync of LTR mechanism configuration

2021-01-11 Thread mingchuang.qiao
From: Mingchuang Qiao In pci bus scan flow, the LTR mechanism enable bit of DEVCTL2 register is configured in pci_configure_ltr(). If device and it's bridge both support LTR mechanism, LTR mechanism of device and it's bridge will be enabled in DEVCTL2 register. And the flag pci_dev->ltr_path