On Tue, 2021-01-12 at 15:36 -0600, Bjorn Helgaas wrote:
> Note subject line tips at
> https://lore.kernel.org/r/20171026223701.ga25...@bhelgaas-glaptop.roam.corp.google.com
>
> On Tue, Jan 12, 2021 at 03:27:39PM +0800, mingchuang.q...@mediatek.com wrote:
> > From: Mingchuang Qiao
> >
> > In
Note subject line tips at
https://lore.kernel.org/r/20171026223701.ga25...@bhelgaas-glaptop.roam.corp.google.com
On Tue, Jan 12, 2021 at 03:27:39PM +0800, mingchuang.q...@mediatek.com wrote:
> From: Mingchuang Qiao
>
> In pci bus scan flow, the LTR mechanism enable bit of DEVCTL2 register
> is
From: Mingchuang Qiao
In pci bus scan flow, the LTR mechanism enable bit of DEVCTL2 register
is configured in pci_configure_ltr(). If device and it's bridge both
support LTR mechanism, LTR mechanism of device and it's bridge will
be enabled in DEVCTL2 register. And the flag pci_dev->ltr_path
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