Re: [PATCH] perf/x86: Fix integer overflow when left shifting an integer more than 32 bits

2021-04-20 Thread Colin Ian King
On 20/04/2021 16:31, Peter Zijlstra wrote: > On Tue, Apr 20, 2021 at 05:03:03PM +0200, Peter Zijlstra wrote: >> On Tue, Apr 20, 2021 at 03:29:07PM +0100, Colin King wrote: >>> From: Colin Ian King >>> >>> The 64 bit value read from MSR_ARCH_PERFMON_FIXED_CTR_CTRL is being >>> bit-wise masked with

Re: [PATCH] perf/x86: Fix integer overflow when left shifting an integer more than 32 bits

2021-04-20 Thread Peter Zijlstra
On Tue, Apr 20, 2021 at 05:03:03PM +0200, Peter Zijlstra wrote: > On Tue, Apr 20, 2021 at 03:29:07PM +0100, Colin King wrote: > > From: Colin Ian King > > > > The 64 bit value read from MSR_ARCH_PERFMON_FIXED_CTR_CTRL is being > > bit-wise masked with the value (0x03 << i*4). However, the

Re: [PATCH] perf/x86: Fix integer overflow when left shifting an integer more than 32 bits

2021-04-20 Thread Peter Zijlstra
On Tue, Apr 20, 2021 at 03:29:07PM +0100, Colin King wrote: > From: Colin Ian King > > The 64 bit value read from MSR_ARCH_PERFMON_FIXED_CTR_CTRL is being > bit-wise masked with the value (0x03 << i*4). However, the shifted value > is evaluated using 32 bit arithmetic, so will overflow when i >

[PATCH] perf/x86: Fix integer overflow when left shifting an integer more than 32 bits

2021-04-20 Thread Colin King
From: Colin Ian King The 64 bit value read from MSR_ARCH_PERFMON_FIXED_CTR_CTRL is being bit-wise masked with the value (0x03 << i*4). However, the shifted value is evaluated using 32 bit arithmetic, so will overflow when i > 8. Fix this by making 0x03 a ULL so that the shift is performed using