On 17/10/2017 12:08, Philipp Zabel wrote:
> Hi Neil,
>
> On Mon, 2017-10-16 at 17:26 +0200, Neil Armstrong wrote:
>> The Amlogic GX SoC family embeds alternate registers to drive the reset
>> levels next to the pulse registers.
>>
>> This patch adds support for level reset handling on the GX
On 17/10/2017 12:08, Philipp Zabel wrote:
> Hi Neil,
>
> On Mon, 2017-10-16 at 17:26 +0200, Neil Armstrong wrote:
>> The Amlogic GX SoC family embeds alternate registers to drive the reset
>> levels next to the pulse registers.
>>
>> This patch adds support for level reset handling on the GX
Hi Neil,
On Mon, 2017-10-16 at 17:26 +0200, Neil Armstrong wrote:
> The Amlogic GX SoC family embeds alternate registers to drive the reset
> levels next to the pulse registers.
>
> This patch adds support for level reset handling on the GX family only.
>
> The Meson8 family has an alternate
Hi Neil,
On Mon, 2017-10-16 at 17:26 +0200, Neil Armstrong wrote:
> The Amlogic GX SoC family embeds alternate registers to drive the reset
> levels next to the pulse registers.
>
> This patch adds support for level reset handling on the GX family only.
>
> The Meson8 family has an alternate
The Amlogic GX SoC family embeds alternate registers to drive the reset
levels next to the pulse registers.
This patch adds support for level reset handling on the GX family only.
The Meson8 family has an alternate way to handle level reset.
Signed-off-by: Neil Armstrong
The Amlogic GX SoC family embeds alternate registers to drive the reset
levels next to the pulse registers.
This patch adds support for level reset handling on the GX family only.
The Meson8 family has an alternate way to handle level reset.
Signed-off-by: Neil Armstrong
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