On Thu, 30 May 2013 20:04:48 +0400, Sergey Yanovich
wrote:
> From f1cd048a066b249082752a96abce7d33a0cd4ea3 Mon Sep 17 00:00:00 2001
> From: Sergey Yanovich
> Date: Tue, 21 May 2013 03:06:31 +0400
> Subject: [PATCH] rtc-ds1302: handle write protection
>
> This chip has a contro
>From f1cd048a066b249082752a96abce7d33a0cd4ea3 Mon Sep 17 00:00:00 2001
From: Sergey Yanovich
Date: Tue, 21 May 2013 03:06:31 +0400
Subject: [PATCH] rtc-ds1302: handle write protection
This chip has a control register and can prevent altering saved clock.
Without this patch we could have:
--
On Thu, 30 May 2013 14:14:42 +0400, Sergey Yanovich
wrote:
> On Wed, 2013-05-29 at 15:53 -0700, Andrew Morton wrote:
>> On Tue, 21 May 2013 03:21:30 +0400 Sergey Yanovich
>> wrote:
>> @@ -321,6 +326,7 @@ static int ds1302_rtc_remove(struct platform_device
>> *pdev)
>> > {
>> >struct rtc_devi
On Wed, 2013-05-29 at 15:53 -0700, Andrew Morton wrote:
> On Tue, 21 May 2013 03:21:30 +0400 Sergey Yanovich wrote:
> @@ -321,6 +326,7 @@ static int ds1302_rtc_remove(struct platform_device *pdev)
> > {
> > struct rtc_device *rtc = platform_get_drvdata(pdev);
> >
> > + ds1302_writebyte(RT
On Tue, 21 May 2013 03:21:30 +0400 Sergey Yanovich wrote:
> This chip has a control register and can prevent altering saved clock.
> Without this patch we could have:
> 8<
> (arm)root@pac14:~# date
> Tue May 21 03:08:27 MSK 2013
> (arm)root@pac14:~# /etc/init.d/hwclock.sh show
> Tue May 2
This chip has a control register and can prevent altering saved clock.
Without this patch we could have:
8<
(arm)root@pac14:~# date
Tue May 21 03:08:27 MSK 2013
(arm)root@pac14:~# /etc/init.d/hwclock.sh show
Tue May 21 11:13:58 2013 -0.067322 seconds
(arm)root@pac14:~# /etc/init.d/hwclock.
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