Re: [PATCH] serial: tegra: add serial driver

2012-12-19 Thread Grant Likely
On Wed, 19 Dec 2012 09:58:18 -0700, Stephen Warren wrote: > On 12/19/2012 07:15 AM, Laxman Dewangan wrote: > > On Wednesday 19 December 2012 06:31 PM, Grant Likely wrote: > >> On Mon, 17 Dec 2012 14:31:34 -0700, Stephen > >> Warren wrote: > >>> On 12/17/2012 10:10 AM, Grant Likely wrote: >

Re: [PATCH] serial: tegra: add serial driver

2012-12-19 Thread Stephen Warren
On 12/19/2012 07:15 AM, Laxman Dewangan wrote: > On Wednesday 19 December 2012 06:31 PM, Grant Likely wrote: >> On Mon, 17 Dec 2012 14:31:34 -0700, Stephen >> Warren wrote: >>> On 12/17/2012 10:10 AM, Grant Likely wrote: On Mon, 17 Dec 2012 17:40:49 +0530, Laxman Dewangan wrote: >>> >>>

Re: [PATCH] serial: tegra: add serial driver

2012-12-19 Thread Laxman Dewangan
On Wednesday 19 December 2012 06:31 PM, Grant Likely wrote: On Mon, 17 Dec 2012 14:31:34 -0700, Stephen Warren wrote: On 12/17/2012 10:10 AM, Grant Likely wrote: On Mon, 17 Dec 2012 17:40:49 +0530, Laxman Dewangan wrote: Aren't we still supposed to support platform data so that it can ove

Re: [PATCH] serial: tegra: add serial driver

2012-12-19 Thread Grant Likely
On Mon, 17 Dec 2012 12:17:16 -1000, Mitch Bradley wrote: > On 12/17/2012 12:04 PM, Stephen Warren wrote: > > On 12/17/2012 02:58 PM, Mitch Bradley wrote: > >> On 12/17/2012 11:36 AM, Stephen Warren wrote: > >>> On 12/17/2012 05:10 AM, Laxman Dewangan wrote: > Nvidia's Tegra has multiple uart

Re: [PATCH] serial: tegra: add serial driver

2012-12-19 Thread Grant Likely
On Mon, 17 Dec 2012 14:31:34 -0700, Stephen Warren wrote: > On 12/17/2012 10:10 AM, Grant Likely wrote: > > On Mon, 17 Dec 2012 17:40:49 +0530, Laxman Dewangan > > wrote: > >> Nvidia's Tegra has multiple uart controller which supports: > >> - APB dma based controller fifo read/write. > >> - End

Re: [PATCH] serial: tegra: add serial driver

2012-12-17 Thread Mitch Bradley
On 12/17/2012 12:04 PM, Stephen Warren wrote: > On 12/17/2012 02:58 PM, Mitch Bradley wrote: >> On 12/17/2012 11:36 AM, Stephen Warren wrote: >>> On 12/17/2012 05:10 AM, Laxman Dewangan wrote: Nvidia's Tegra has multiple uart controller which supports: - APB dma based controller fifo read

Re: [PATCH] serial: tegra: add serial driver

2012-12-17 Thread Stephen Warren
On 12/17/2012 02:58 PM, Mitch Bradley wrote: > On 12/17/2012 11:36 AM, Stephen Warren wrote: >> On 12/17/2012 05:10 AM, Laxman Dewangan wrote: >>> Nvidia's Tegra has multiple uart controller which supports: >>> - APB dma based controller fifo read/write. >>> - End Of Data interrupt in incoming data

Re: [PATCH] serial: tegra: add serial driver

2012-12-17 Thread Mitch Bradley
On 12/17/2012 11:36 AM, Stephen Warren wrote: > On 12/17/2012 05:10 AM, Laxman Dewangan wrote: >> Nvidia's Tegra has multiple uart controller which supports: >> - APB dma based controller fifo read/write. >> - End Of Data interrupt in incoming data to know whether end >> of frame achieve or not.

Re: [PATCH] serial: tegra: add serial driver

2012-12-17 Thread Stephen Warren
On 12/17/2012 05:10 AM, Laxman Dewangan wrote: > Nvidia's Tegra has multiple uart controller which supports: > - APB dma based controller fifo read/write. > - End Of Data interrupt in incoming data to know whether end > of frame achieve or not. > - Hw controlled RTS and CTS flow control to reduce

Re: [PATCH] serial: tegra: add serial driver

2012-12-17 Thread Stephen Warren
On 12/17/2012 05:10 AM, Laxman Dewangan wrote: > Nvidia's Tegra has multiple uart controller which supports: > - APB dma based controller fifo read/write. > - End Of Data interrupt in incoming data to know whether end > of frame achieve or not. > - Hw controlled RTS and CTS flow control to reduce

Re: [PATCH] serial: tegra: add serial driver

2012-12-17 Thread Stephen Warren
On 12/17/2012 10:10 AM, Grant Likely wrote: > On Mon, 17 Dec 2012 17:40:49 +0530, Laxman Dewangan > wrote: >> Nvidia's Tegra has multiple uart controller which supports: >> - APB dma based controller fifo read/write. >> - End Of Data interrupt in incoming data to know whether end >> of frame ac

Re: [PATCH] serial: tegra: add serial driver

2012-12-17 Thread Stephen Warren
On 12/17/2012 08:24 AM, Rob Herring wrote: > On 12/17/2012 06:10 AM, Laxman Dewangan wrote: >> Nvidia's Tegra has multiple uart controller which supports: >> - APB dma based controller fifo read/write. >> - End Of Data interrupt in incoming data to know whether end >> of frame achieve or not. >>

Re: [PATCH] serial: tegra: add serial driver

2012-12-17 Thread Alan Cox
> + > +static void tegra_uart_copy_rx_to_tty(struct tegra_uart_port *tup, int count) > +{ > + int copied; > + > + tup->uport.icount.rx += count; > + dma_sync_single_for_cpu(tup->uport.dev, tup->rx_dma_buf_phys, > + TEGRA_UART_RX_DMA_BUFFER_SIZE, DMA_FROM_DE

Re: [PATCH] serial: tegra: add serial driver

2012-12-17 Thread Grant Likely
On Mon, 17 Dec 2012 17:40:49 +0530, Laxman Dewangan wrote: > Nvidia's Tegra has multiple uart controller which supports: > - APB dma based controller fifo read/write. > - End Of Data interrupt in incoming data to know whether end > of frame achieve or not. > - Hw controlled RTS and CTS flow con

Re: [PATCH] serial: tegra: add serial driver

2012-12-17 Thread Rob Herring
On 12/17/2012 06:10 AM, Laxman Dewangan wrote: > Nvidia's Tegra has multiple uart controller which supports: > - APB dma based controller fifo read/write. > - End Of Data interrupt in incoming data to know whether end > of frame achieve or not. > - Hw controlled RTS and CTS flow control to reduce

Re: [PATCH] serial: tegra: add serial driver

2012-12-17 Thread Greg KH
On Mon, Dec 17, 2012 at 05:40:49PM +0530, Laxman Dewangan wrote: > Nvidia's Tegra has multiple uart controller which supports: > - APB dma based controller fifo read/write. > - End Of Data interrupt in incoming data to know whether end > of frame achieve or not. > - Hw controlled RTS and CTS flow

[PATCH] serial: tegra: add serial driver

2012-12-17 Thread Laxman Dewangan
Nvidia's Tegra has multiple uart controller which supports: - APB dma based controller fifo read/write. - End Of Data interrupt in incoming data to know whether end of frame achieve or not. - Hw controlled RTS and CTS flow control to reduce SW overhead. Add serial driver to use all above feature