On Fri, Sep 20, 2019 at 05:27:49PM +0200, Gregory CLEMENT wrote:
> But after going further in the details of the driver, this patch could
> cause a regression for on the old controllers.
> I also found other issues in this driver in the chip select
> management. So I will send a new series
Hello Mark,
> On Thu, Sep 19, 2019 at 07:23:50PM +0200, Alexandre Belloni wrote:
>> On 19/09/2019 17:03:15+0100, Mark Brown wrote:
>
>> > This is going to break any system where we use both a GPIO chip select
>> > and chip select 0. Ideally we'd try to figure out an unused chip select
>> > to
On Thu, Sep 19, 2019 at 07:23:50PM +0200, Alexandre Belloni wrote:
> On 19/09/2019 17:03:15+0100, Mark Brown wrote:
> > This is going to break any system where we use both a GPIO chip select
> > and chip select 0. Ideally we'd try to figure out an unused chip select
> > to use here...
> The
On 19/09/2019 17:03:15+0100, Mark Brown wrote:
> On Thu, Sep 19, 2019 at 05:38:47PM +0200, Gregory CLEMENT wrote:
>
> > With this patch, when using a gpio CS, the hardware CS0 is always
> > used. Thanks to this, there is no more limitation for the number of
> > gpio CS we can use.
>
> This is
On Thu, Sep 19, 2019 at 05:38:47PM +0200, Gregory CLEMENT wrote:
> With this patch, when using a gpio CS, the hardware CS0 is always
> used. Thanks to this, there is no more limitation for the number of
> gpio CS we can use.
This is going to break any system where we use both a GPIO chip select
Even when using a gpio as chip select, the registers controlling the
hardware chip select have to be configured. However any of the 4
hardware CS can be controlled.
Until now, the gpio index was used to match an hardware chip select,
which limited the number of CS than can be used. Using more
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