Re: [PATCH] thermal: exynos: handle gate clock for misplaced TRIMINFO register

2014-02-10 Thread Naveen Krishna Ch
Hello Mark, On 10 February 2014 16:37, Mark Rutland wrote: > On Mon, Feb 10, 2014 at 10:50:01AM +, Naveen Krishna Ch wrote: >> Hello Mark, >> >> On 10 February 2014 16:03, Mark Rutland wrote: >> > On Thu, Nov 07, 2013 at 12:42:34PM +, Naveen Krishna Chatradhi wrote: >> >> On Exynos5420 t

Re: [PATCH] thermal: exynos: handle gate clock for misplaced TRIMINFO register

2014-02-10 Thread Mark Rutland
On Mon, Feb 10, 2014 at 10:50:01AM +, Naveen Krishna Ch wrote: > Hello Mark, > > On 10 February 2014 16:03, Mark Rutland wrote: > > On Thu, Nov 07, 2013 at 12:42:34PM +, Naveen Krishna Chatradhi wrote: > >> On Exynos5420 the TMU(4) for GPU has a seperate clock enable bit from > >> the oth

Re: [PATCH] thermal: exynos: handle gate clock for misplaced TRIMINFO register

2014-02-10 Thread Naveen Krishna Ch
Hello Mark, On 10 February 2014 16:03, Mark Rutland wrote: > On Thu, Nov 07, 2013 at 12:42:34PM +, Naveen Krishna Chatradhi wrote: >> On Exynos5420 the TMU(4) for GPU has a seperate clock enable bit from >> the other TMU channels(0 ~ 3). Hence, accessing TRIMINFO for base_second >> should be

Re: [PATCH] thermal: exynos: handle gate clock for misplaced TRIMINFO register

2014-02-10 Thread Mark Rutland
On Thu, Nov 07, 2013 at 12:42:34PM +, Naveen Krishna Chatradhi wrote: > On Exynos5420 the TMU(4) for GPU has a seperate clock enable bit from > the other TMU channels(0 ~ 3). Hence, accessing TRIMINFO for base_second > should be acompanied by enabling the respective clock. > > This patch which

Re: [PATCH] thermal: exynos: handle gate clock for misplaced TRIMINFO register

2014-02-07 Thread Naveen Krishna Ch
Hello All, On 2 January 2014 11:37, Zhang Rui wrote: > On Thu, 2013-11-07 at 18:12 +0530, Naveen Krishna Chatradhi wrote: >> On Exynos5420 the TMU(4) for GPU has a seperate clock enable bit from >> the other TMU channels(0 ~ 3). Hence, accessing TRIMINFO for base_second >> should be acompanied by

Re: [PATCH] thermal: exynos: handle gate clock for misplaced TRIMINFO register

2014-01-01 Thread Zhang Rui
On Thu, 2013-11-07 at 18:12 +0530, Naveen Krishna Chatradhi wrote: > On Exynos5420 the TMU(4) for GPU has a seperate clock enable bit from > the other TMU channels(0 ~ 3). Hence, accessing TRIMINFO for base_second > should be acompanied by enabling the respective clock. > > This patch which allow

Re: [PATCH] thermal: exynos: handle gate clock for misplaced TRIMINFO register

2013-11-07 Thread Naveen Krishna Ch
On 7 November 2013 19:48, Tomasz Figa wrote: > Hi Naveen, > > On Thursday 07 of November 2013 18:12:34 Naveen Krishna Chatradhi wrote: >> On Exynos5420 the TMU(4) for GPU has a seperate clock enable bit from >> the other TMU channels(0 ~ 3). Hence, accessing TRIMINFO for base_second >> should be a

Re: [PATCH] thermal: exynos: handle gate clock for misplaced TRIMINFO register

2013-11-07 Thread Tomasz Figa
Hi Naveen, On Thursday 07 of November 2013 18:12:34 Naveen Krishna Chatradhi wrote: > On Exynos5420 the TMU(4) for GPU has a seperate clock enable bit from > the other TMU channels(0 ~ 3). Hence, accessing TRIMINFO for base_second > should be acompanied by enabling the respective clock. > > This

[PATCH] thermal: exynos: handle gate clock for misplaced TRIMINFO register

2013-11-07 Thread Naveen Krishna Chatradhi
On Exynos5420 the TMU(4) for GPU has a seperate clock enable bit from the other TMU channels(0 ~ 3). Hence, accessing TRIMINFO for base_second should be acompanied by enabling the respective clock. This patch which allow for a "clk_sec" clock to be specified in the device-tree which will be ungate