: Re: [PATCH] x86/asm: Add support for MOVDIR64B instruction
On Thu, Aug 01, 2019 at 10:06:27PM +, Luck, Tony wrote:
> > I think Tony's in the right direction. We already do dst "sizing"
> > like that for the compiler in clwb().
>
> The clwb case does loo
On Thu, Aug 01, 2019 at 10:06:27PM +, Luck, Tony wrote:
> > I think Tony's in the right direction. We already do dst "sizing" like
> > that for the compiler in clwb().
>
> The clwb case does look like what we want for movdir64b().
>
> But is it right for clwb() ... that doesn't modify anythin
On Fri, Aug 02, 2019 at 10:15:33AM +0200, Peter Zijlstra wrote:
> On Thu, Aug 01, 2019 at 12:49:48PM -0700, Luck, Tony wrote:
> > On Thu, Aug 01, 2019 at 10:43:48PM +0300, Alexey Dobriyan wrote:
> > > > +static inline void movdir64b(void *dst, const void *src)
> > > > +{
> > > > + /* movdir64
On Thu, Aug 01, 2019 at 12:49:48PM -0700, Luck, Tony wrote:
> On Thu, Aug 01, 2019 at 10:43:48PM +0300, Alexey Dobriyan wrote:
> > > +static inline void movdir64b(void *dst, const void *src)
> > > +{
> > > + /* movdir64b [rdx], rax */
> > > + asm volatile(".byte 0x66, 0x0f, 0x38, 0xf8, 0x02"
> > >
> I think Tony's in the right direction. We already do dst "sizing" like
> that for the compiler in clwb().
The clwb case does look like what we want for movdir64b().
But is it right for clwb() ... that doesn't modify anything, just pushes
things from cache to memory. So why is it using "+m"?
-T
On Thu, Aug 01, 2019 at 12:49:48PM -0700, Luck, Tony wrote:
> On Thu, Aug 01, 2019 at 10:43:48PM +0300, Alexey Dobriyan wrote:
> > > +static inline void movdir64b(void *dst, const void *src)
> > > +{
> > > + /* movdir64b [rdx], rax */
> > > + asm volatile(".byte 0x66, 0x0f, 0x38, 0xf8, 0x02"
> > >
On Thu, Aug 01, 2019 at 11:28:08PM +0300, Kirill A. Shutemov wrote:
> On Thu, Aug 01, 2019 at 12:49:48PM -0700, Luck, Tony wrote:
> > On Thu, Aug 01, 2019 at 10:43:48PM +0300, Alexey Dobriyan wrote:
> > > > +static inline void movdir64b(void *dst, const void *src)
> > > > +{
> > > > + /* movd
On Thu, Aug 01, 2019 at 12:49:48PM -0700, Luck, Tony wrote:
> On Thu, Aug 01, 2019 at 10:43:48PM +0300, Alexey Dobriyan wrote:
> > > +static inline void movdir64b(void *dst, const void *src)
> > > +{
> > > + /* movdir64b [rdx], rax */
> > > + asm volatile(".byte 0x66, 0x0f, 0x38, 0xf8, 0x02"
> > >
On Thu, Aug 01, 2019 at 10:43:48PM +0300, Alexey Dobriyan wrote:
> > +static inline void movdir64b(void *dst, const void *src)
> > +{
> > + /* movdir64b [rdx], rax */
> > + asm volatile(".byte 0x66, 0x0f, 0x38, 0xf8, 0x02"
> > + : "=m" (*(char *)dst)
>
> +static inline void movdir64b(void *dst, const void *src)
> +{
> + /* movdir64b [rdx], rax */
> + asm volatile(".byte 0x66, 0x0f, 0x38, 0xf8, 0x02"
> + : "=m" (*(char *)dst)
^^
> + : "d" (src), "a" (dst));
> +
On Thu, Aug 01, 2019 at 12:20:30PM -0700, Luck, Tony wrote:
> Just to get another of the non-controversial bits out of the
> way before the main course arrives.
Let's submit functions together with their respective users pls. Like we
always do.
Thx.
--
Regards/Gruss,
Boris.
Good mailing pr
On Thu, Aug 01, 2019 at 12:03:41PM +0200, Borislav Petkov wrote:
> On Wed, Jul 31, 2019 at 02:05:54AM +0300, Kirill A. Shutemov wrote:
> > Several upcoming patchsets will make use of the helper.
>
> ... so why aren't you sending it together with its first user?
Just to get another of the non-cont
On Thu, Aug 01, 2019 at 10:03:41AM +, Borislav Petkov wrote:
> On Wed, Jul 31, 2019 at 02:05:54AM +0300, Kirill A. Shutemov wrote:
> > Add support for a new instruction MOVDIR64B. The instruction moves
> > 64-bytes as direct-store with 64-byte write atomicity from source memory
> > address to d
On Wed, Jul 31, 2019 at 02:05:54AM +0300, Kirill A. Shutemov wrote:
> Add support for a new instruction MOVDIR64B. The instruction moves
> 64-bytes as direct-store with 64-byte write atomicity from source memory
> address to destination memory address.
>
> MOVDIR64B requires the destination addres
On 7/30/19 4:05 PM, Kirill A. Shutemov wrote:
Add support for a new instruction MOVDIR64B. The instruction moves
64-bytes as direct-store with 64-byte write atomicity from source memory
address to destination memory address.
MOVDIR64B requires the destination address to be 64-byte aligned. No
Add support for a new instruction MOVDIR64B. The instruction moves
64-bytes as direct-store with 64-byte write atomicity from source memory
address to destination memory address.
MOVDIR64B requires the destination address to be 64-byte aligned. No
alignment restriction is enforced for source opera
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