Re: [PATCH] x86/hpet: Disable HPET on Intel Coffe Lake

2019-10-08 Thread Feng Tang
Hi Kai-Heng, On Thu, Aug 29, 2019 at 5:14 PM Kai-Heng Feng wrote: > > Some Coffee Lake platforms have skewed HPET timer once the SoCs entered > PC10, and marked TSC as unstable clocksource as result. > > Harry Pan identified it's a firmware bug [1]. > > To prevent creating a circular dependency b

Re: [PATCH] x86/hpet: Disable HPET on Intel Coffe Lake

2019-10-01 Thread Kai-Heng Feng
Hi Thomas, > On Aug 30, 2019, at 03:45, Thomas Gleixner wrote: > > On Thu, 29 Aug 2019, Kai-Heng Feng wrote: >> at 20:13, Thomas Gleixner wrote: >>> On Thu, 29 Aug 2019, Kai-Heng Feng wrote: >>> Some Coffee Lake platforms have skewed HPET timer once the SoCs entered PC10, and marked

Re: [PATCH] x86/hpet: Disable HPET on Intel Coffe Lake

2019-08-29 Thread Thomas Gleixner
On Thu, 29 Aug 2019, Kai-Heng Feng wrote: > at 20:13, Thomas Gleixner wrote: > > On Thu, 29 Aug 2019, Kai-Heng Feng wrote: > > > > > Some Coffee Lake platforms have skewed HPET timer once the SoCs entered > > > PC10, and marked TSC as unstable clocksource as result. > > > > So here you talk abou

Re: [PATCH] x86/hpet: Disable HPET on Intel Coffe Lake

2019-08-29 Thread Kai-Heng Feng
at 20:13, Thomas Gleixner wrote: On Thu, 29 Aug 2019, Kai-Heng Feng wrote: Some Coffee Lake platforms have skewed HPET timer once the SoCs entered PC10, and marked TSC as unstable clocksource as result. So here you talk about Coffee Lake and in the patch you use KABYLAKE. Coffeelake has t

Re: [PATCH] x86/hpet: Disable HPET on Intel Coffe Lake

2019-08-29 Thread Thomas Gleixner
On Thu, 29 Aug 2019, Kai-Heng Feng wrote: > Some Coffee Lake platforms have skewed HPET timer once the SoCs entered > PC10, and marked TSC as unstable clocksource as result. So here you talk about Coffee Lake and in the patch you use KABYLAKE. > Harry Pan identified it's a firmware bug [1]. >

[PATCH] x86/hpet: Disable HPET on Intel Coffe Lake

2019-08-29 Thread Kai-Heng Feng
Some Coffee Lake platforms have skewed HPET timer once the SoCs entered PC10, and marked TSC as unstable clocksource as result. Harry Pan identified it's a firmware bug [1]. To prevent creating a circular dependency between HPET and TSC, let's disable HPET on affected platforms. [1]: https://lor