Re: [PATCH] x86/intel_cacheinfo: Fix LLC topology for AMD Fam17h systems

2015-11-03 Thread Aravind Gopalakrishnan
On 11/3/2015 1:52 PM, Borislav Petkov wrote: On Tue, Nov 03, 2015 at 01:41:53PM -0600, Aravind Gopalakrishnan wrote: cpu_llc_id references should be wrapped under #ifdef CONFIG_SMP. Did that and kernel build worked with the attached config. Will send a V2 with the fix. Why aren't you doing al

Re: [PATCH] x86/intel_cacheinfo: Fix LLC topology for AMD Fam17h systems

2015-11-03 Thread Borislav Petkov
On Tue, Nov 03, 2015 at 01:41:53PM -0600, Aravind Gopalakrishnan wrote: > cpu_llc_id references should be wrapped under #ifdef CONFIG_SMP. > > Did that and kernel build worked with the attached config. > > Will send a V2 with the fix. Why aren't you doing all that figuring out what the llc_id is

Re: [PATCH] x86/intel_cacheinfo: Fix LLC topology for AMD Fam17h systems

2015-11-03 Thread Aravind Gopalakrishnan
On 11/3/2015 1:27 PM, kbuild test robot wrote: Hi Aravind, [auto build test ERROR on bp/for-next] [also ERROR on: v4.3 next-20151103] url: https://github.com/0day-ci/linux/commits/Aravind-Gopalakrishnan/x86-intel_cacheinfo-Fix-LLC-topology-for-AMD-Fam17h-systems/20151104-031725 base: http

Re: [PATCH] x86/intel_cacheinfo: Fix LLC topology for AMD Fam17h systems

2015-11-03 Thread kbuild test robot
Hi Aravind, [auto build test ERROR on bp/for-next] [also ERROR on: v4.3 next-20151103] url: https://github.com/0day-ci/linux/commits/Aravind-Gopalakrishnan/x86-intel_cacheinfo-Fix-LLC-topology-for-AMD-Fam17h-systems/20151104-031725 base: https://github.com/0day-ci/linux Aravind-Gopalakrish

[PATCH] x86/intel_cacheinfo: Fix LLC topology for AMD Fam17h systems

2015-11-03 Thread Aravind Gopalakrishnan
On AMD Fam17h systems, the last level cache is not resident in Northbridge. Therefore, we cannot assign cpu_llc_id to same value as Node ID (as we have been doing currently) We should rather look at the ApicID bits of the core to provide us the last level cache ID info. Doing that here. Signed-of