On Mon, 30 Jul 2018, Prakhya, Sai Praneeth wrote:
> > > >> From: Sai Praneeth Some future
> > > >> Intel processors may support "Enhanced IBRS" which is an "always
> > > >> on" mode i.e. IBRS bit in SPEC_CTRL MSR is enabled once and never
> > > >> disabled. According to specification[1], this
On Mon, 30 Jul 2018, Prakhya, Sai Praneeth wrote:
> > > >> From: Sai Praneeth Some future
> > > >> Intel processors may support "Enhanced IBRS" which is an "always
> > > >> on" mode i.e. IBRS bit in SPEC_CTRL MSR is enabled once and never
> > > >> disabled. According to specification[1], this
> > >> From: Sai Praneeth Some future
> > >> Intel processors may support "Enhanced IBRS" which is an "always
> > >> on" mode i.e. IBRS bit in SPEC_CTRL MSR is enabled once and never
> > >> disabled. According to specification[1], this should simplify
> > >> software enabling and improve
> > >> From: Sai Praneeth Some future
> > >> Intel processors may support "Enhanced IBRS" which is an "always
> > >> on" mode i.e. IBRS bit in SPEC_CTRL MSR is enabled once and never
> > >> disabled. According to specification[1], this should simplify
> > >> software enabling and improve
On Mon, 30 Jul 2018, Dave Hansen wrote:
> On 07/30/2018 05:25 AM, Thomas Gleixner wrote:
> > On Tue, 24 Jul 2018, Sai Praneeth Prakhya wrote:
> >> From: Sai Praneeth
> >> Some future Intel processors may support "Enhanced IBRS" which is an
> >> "always on" mode i.e. IBRS bit in SPEC_CTRL MSR is
On Mon, 30 Jul 2018, Dave Hansen wrote:
> On 07/30/2018 05:25 AM, Thomas Gleixner wrote:
> > On Tue, 24 Jul 2018, Sai Praneeth Prakhya wrote:
> >> From: Sai Praneeth
> >> Some future Intel processors may support "Enhanced IBRS" which is an
> >> "always on" mode i.e. IBRS bit in SPEC_CTRL MSR is
On 07/30/2018 05:25 AM, Thomas Gleixner wrote:
> On Tue, 24 Jul 2018, Sai Praneeth Prakhya wrote:
>> From: Sai Praneeth
>> Some future Intel processors may support "Enhanced IBRS" which is an
>> "always on" mode i.e. IBRS bit in SPEC_CTRL MSR is enabled once and
>> never disabled. According to
On 07/30/2018 05:25 AM, Thomas Gleixner wrote:
> On Tue, 24 Jul 2018, Sai Praneeth Prakhya wrote:
>> From: Sai Praneeth
>> Some future Intel processors may support "Enhanced IBRS" which is an
>> "always on" mode i.e. IBRS bit in SPEC_CTRL MSR is enabled once and
>> never disabled. According to
On Tue, 24 Jul 2018, Sai Praneeth Prakhya wrote:
> From: Sai Praneeth
>
> Some future Intel processors may support "Enhanced IBRS" which is an
> "always on" mode i.e. IBRS bit in SPEC_CTRL MSR is enabled once and
> never disabled. According to specification[1], this should simplify
> software
On Tue, 24 Jul 2018, Sai Praneeth Prakhya wrote:
> From: Sai Praneeth
>
> Some future Intel processors may support "Enhanced IBRS" which is an
> "always on" mode i.e. IBRS bit in SPEC_CTRL MSR is enabled once and
> never disabled. According to specification[1], this should simplify
> software
From: Sai Praneeth
Some future Intel processors may support "Enhanced IBRS" which is an
"always on" mode i.e. IBRS bit in SPEC_CTRL MSR is enabled once and
never disabled. According to specification[1], this should simplify
software enabling and improve performance.
[With enhanced IBRS, the
From: Sai Praneeth
Some future Intel processors may support "Enhanced IBRS" which is an
"always on" mode i.e. IBRS bit in SPEC_CTRL MSR is enabled once and
never disabled. According to specification[1], this should simplify
software enabling and improve performance.
[With enhanced IBRS, the
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