Re: [PATCH] x86: handle MSR exception when setting energy perf bias

2017-10-12 Thread Alan Cox
On Thu, 12 Oct 2017 01:30:07 -0300 Gabriel Krisman Bertazi wrote: > On very rare occasions, immediately after a suspend, one of our > SandyBridge CI boxes hits the exception below on CPU0 while trying to > reconfigure the energy bias register. As far as I can tell, this is not > likely a race in

[PATCH] x86: handle MSR exception when setting energy perf bias

2017-10-11 Thread Gabriel Krisman Bertazi
On very rare occasions, immediately after a suspend, one of our SandyBridge CI boxes hits the exception below on CPU0 while trying to reconfigure the energy bias register. As far as I can tell, this is not likely a race in the kernel, since we have only one cpu online, no preempt and irqs_disabled