On Mon, 25 Feb 2008 08:28:51 -0800 mark gross <[EMAIL PROTECTED]> wrote:
> > > + /*just flush them all*/
> >
> > I'm surprised that checkpatch didn't grump about the odd commenting style.
>
> It didn't. What's odd about the comment style here?
We normally put a space after "/*" and before
On Sat, Feb 23, 2008 at 12:05:17AM -0800, Andrew Morton wrote:
> On Wed, 20 Feb 2008 16:06:23 -0800 mark gross <[EMAIL PROTECTED]> wrote:
>
> > The following patch is for batching up the flushing of the IOTLB for
> > the DMAR implementation found in the Intel VT-d hardware. It works by
> >
On Sat, Feb 23, 2008 at 12:05:17AM -0800, Andrew Morton wrote:
On Wed, 20 Feb 2008 16:06:23 -0800 mark gross [EMAIL PROTECTED] wrote:
The following patch is for batching up the flushing of the IOTLB for
the DMAR implementation found in the Intel VT-d hardware. It works by
building a list
On Mon, 25 Feb 2008 08:28:51 -0800 mark gross [EMAIL PROTECTED] wrote:
+ /*just flush them all*/
I'm surprised that checkpatch didn't grump about the odd commenting style.
It didn't. What's odd about the comment style here?
We normally put a space after /* and before */
--
To
On Wed, 20 Feb 2008 16:06:23 -0800 mark gross <[EMAIL PROTECTED]> wrote:
> The following patch is for batching up the flushing of the IOTLB for
> the DMAR implementation found in the Intel VT-d hardware. It works by
> building a list of to be flushed IOTLB entries and a bitmap list of
> which
On Wed, 20 Feb 2008 16:06:23 -0800 mark gross [EMAIL PROTECTED] wrote:
The following patch is for batching up the flushing of the IOTLB for
the DMAR implementation found in the Intel VT-d hardware. It works by
building a list of to be flushed IOTLB entries and a bitmap list of
which DMAR
The following patch is for batching up the flushing of the IOTLB for
the DMAR implementation found in the Intel VT-d hardware. It works by
building a list of to be flushed IOTLB entries and a bitmap list of
which DMAR engine they are from.
After either a high water mark (250 accessible via
The following patch is for batching up the flushing of the IOTLB for
the DMAR implementation found in the Intel VT-d hardware. It works by
building a list of to be flushed IOTLB entries and a bitmap list of
which DMAR engine they are from.
After either a high water mark (250 accessible via
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