Dear Sirs,
Missed the first paragraph, sorry for extra mail.
This series is the first version of Mediatek SoCs I2C controller common
bus driver, it is Request for Comment.
Because the clock driver for mediatek SoC is not ready yet(still work in
progress), so I delete the related clock code in
Dear Sirs,
Missed the first paragraph, sorry for extra mail.
This series is the first version of Mediatek SoCs I2C controller common
bus driver, it is Request for Comment.
Because the clock driver for mediatek SoC is not ready yet(still work in
progress), so I delete the related clock code in
This driver is based on 3.18-rc1 & Hongzhou's gpio patch.
MTK I2C HW has some limitation.
1. If the i2c_msg number is more than one, STOP will be issued instead of
RS(Repeat Start) between each message.
Such as: "START + ADDR + DATA_n + STOP + START + ADDR + DATA_n + STOP ..."
2. Mediatek I2C
This driver is based on 3.18-rc1 Hongzhou's gpio patch.
MTK I2C HW has some limitation.
1. If the i2c_msg number is more than one, STOP will be issued instead of
RS(Repeat Start) between each message.
Such as: START + ADDR + DATA_n + STOP + START + ADDR + DATA_n + STOP ...
2. Mediatek I2C
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